Yu-Hsuan Lee

The successively temporal error concealment algorithm using error-adaptive block matching principle

Yu-Hsuan Lee, Tsai-Hsing Wu, Chao-Chyun Chen, 2014 .

Algorithm and VLSI Architecture Designs of a Lossless Embedded Compression Encoder for HD Video Coding Systems

Yu-Hsuan Lee, Cheng-Hung Kuei, Yue-Zhan Kao, 2020, J. Circuits Syst. Comput..

An efficient Multi-Directional Lossless Recompression for video coding systems

Chao-Chyun Chen, Yu-Hsuan Lee, Yi-Guo Chen, 2014, 2014 IEEE International Symposium on Bioelectronics and Bioinformatics (IEEE ISBB 2014).

Design of VLSI Architecture of Autocorrelation-Based Lossless Recompression Engine for Memory-Efficient Video Coding Systems

Chao-Chyun Chen, Yu-Hsuan Lee, Yi-Lun You, 2013, Circuits, Systems, and Signal Processing.

Design and Implementation of Operation-Reduced LDPC Decoder Based on a Check Node Stopping Scheme

Cheng-Hung Lin, Tzu-Hsuan Huang, Shu-Yen Lin, 2017, J. Circuits Syst. Comput..

VLSI Architecture Design of FM0/Manchester Codec With 100% Hardware Utilization Rate for DSRC-Based Sensor Nodes in ITS Applications

Yu-Hsuan Lee, Cheng-Wei Pan, Fang-Hsu Tsai, 2015, IEEE Sensors Journal.

A image-upscaling engine for 1080p to 4k using gradient-based interpolation

Yu-Hsuan Lee, Cheng-Yi Tsai, Nien-An Yu, 2020 .

Algorithm and Architecture Design of FAST-C Image Corner Detection Engine

Yu-Hsuan Lee, Tzu-Chieh Chen, Hsuan-Chi Liang, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.