S. Bilavarn

Exploitation of the EDF Scheduling in the Wireless Sensors Networks

Mohamed Abid, Sébastien Bilavarn, Rym Chéour, 2011, Int. J. Meas. Technol. Instrum. Eng..

Efficiency analysis of artificial vs. Spiking Neural Networks on FPGAs

Benoît Miramond, S. Bilavarn, E. Lemaire, 2022, J. Syst. Archit..

Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems

Benoît Miramond, S. Bilavarn, Hadi Saoud, 2022, ACM Trans. Embed. Comput. Syst..

Towards a power and energy efficient use of partial dynamic reconfiguration

Olivier Sentieys, Daniel Chillet, Sébastien Bilavarn, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations

Jean Luc Philippe, Lilian Bossuet, Guy Gogniat, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Low Complexity Design Space Exploration from Early Specifications [submitted paper]

Lilian Bossuet, Guy Gogniat, Jean-Luc Philippe, 2005 .

Area time power estimation for FPGA based designs at a behavioral level

Guy Gogniat, Sébastien Bilavarn, Jean-Luc Philippe, 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).

An FPGA-Based Hybrid Neural Network Accelerator for Embedded Satellite Image Classification

Sébastien Bilavarn, Benoit Miramond, Philippe Millet, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

Space Use-Case: Onboard Satellite Image Classification

Sébastien Bilavarn, Benoit Miramond, Philippe Millet, 2020, Towards Ubiquitous Low-power Image Processing Platforms.

Power consumption models for the use of dynamic and partial reconfiguration

S. Bilavarn, O. Sentieys, R. Bonamy, 2014, Microprocess. Microsystems.