Chen-Yan Cai

An ELD tracking compensation technique for active-RC CT ΣΔ modulators

Sai-Weng Sin, Chen-Yan Cai, Yang Jiang, 2012, 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS).

A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators

Rui Paulo Martins, Sai-Weng Sin, U Seng-Pan, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators

Rui Paulo Martins, Sai-Weng Sin, U Seng-Pan, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

A passive Excess-Loop-Delay compensation technique for Gm-C based continuous-time ΣΔ modulators

Sai-Weng Sin, Seng-Pan U, Chen-Yan Cai, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active–passive loop-filters

Sai-Weng Sin, Chen-Yan Cai, Yang Jiang, 2013 .

Clock-jitter sensitivity reduction in CT ΣΔ modulators using voltage-crossing detection DAC

Sai-Weng Sin, Seng-Pan U, Chen-Yan Cai, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).