Rajeevan Chandel

发表

A Unified Delay, Power and Crosstalk Model for Current Mode Signaling Multiwall Carbon Nanotube Interconnects

Yash Agrawal, Girish Kumar Mekala, Rajeevan Chandel, 2018, Circuits Syst. Signal Process..

Sub-Threshold Delay and Power Analysis of Complementary Metal-Oxide Semiconductor Buffer Driven Interconnect Load for Ultra Low Power Applications

Rajeevan Chandel, Rohit Dhiman, 2012, J. Low Power Electron..

Compact models and delay computation of sub-threshold interconnect circuits

Rajeevan Chandel, Rohit Dhiman, Rohit Sharma, 2015 .

Analysis of Low Power High Performance XOR Gate Using GDI Technique

Rajeevan Chandel, Atul Kumar Nishad, R. Chandel, 2011, 2011 International Conference on Computational Intelligence and Communication Networks.

Design and Simulation of Energy Efficient Carbon Nanotube based Digital Circuits

Rajeevan Chandel, Sonal Shreya, R. Chandel, 2014 .

Noise Tolerant Techniques in Super and Sub-threshold Regions of TSPC logic

Rajeevan Chandel, Purnima Sharma, Sankar Sarkar, 2011 .

VLSI Microfabrication Technologies and MEMS

Rajeevan Chandel, R. Chandel, 2001 .

Power system dynamic state estimation using prediction based evolutionary technique

Rajeevan Chandel, Vedik Basetti, Ashwani Kumar Chandel, 2016 .

Delay and Power Management of Voltage-Scaled Repeater Driven Long Interconnects

Rajeevan Chandel, R. P. Agarwal, Sankar Sarkar, 2007 .

Comparative Study of Ant Colony and Genetic Algorithms for VLSI Circuit Partitioning

Rajeevan Chandel, Sandeep Singh Gill, Ashwani Kumar Chandel, 2009 .

Concurrent Online Test Architecture for Multiple Controller Blocks with Minimum Fault Latency

Rajeevan Chandel, Philemon Daniel, 2011, 2011 IEEE Ninth International Symposium on Parallel and Distributed Processing with Applications Workshops.

RLC equivalent RC delay model for global VLSI interconnect in current mode signalling

Rajeevan Chandel, Sunil Jadav, Munish Vashishth, 2015 .

Design and analysis of source coupled logic circuits

Rajeevan Chandel, Raghvendra Pratap Varma, 2014, International Conference for Convergence for Technology-2014.

Modelling and performance analysis of dielectric inserted side contact multilayer graphene nanoribbon interconnects

Yash Agrawal, Girish Kumar Mekala, Rajeevan Chandel, 2017, IET Circuits Devices Syst..

A modified low power auto-adaptation unit for reconfigurable analog to digital converter in wireless applications

Rajeevan Chandel, Piyush Pradhan, Rahul Kumar Singh, 2014, 2014 International Conference on Parallel, Distributed and Grid Computing.

Design and Analysis of a Modified Low Power CMOS Full Adder Using Gate-Diffusion Input Technique

Rajeevan Chandel, Kiran K. Chaddha, 2010, J. Low Power Electron..

Design and analysis of efficient multilevel receiver for current mode interconnect system

Yash Agrawal, Rajeevan Chandel, Rohit Dhiman, 2014, 2014 IEEE Students' Conference on Electrical, Electronics and Computer Science.

High-performance Current Mode Receiver Design for On-chip VLSI Interconnects

Yash Agrawal, Rajeevan Chandel, Rohit Dhiman, 2015 .

Subthreshold Interconnect Noise Analysis

Rajeevan Chandel, Rohit Dhiman, 2015 .

High speed RLC equivalent RC delay model for global VLSI interconnects

Rajeevan Chandel, Sunil Jadav, Munish vashishath, 2019 .

Dynamic Ruleset Based Online Concurrent Testing of Functional Faults for Embedded Controllers

Rajeevan Chandel, Philemon Daniel, 2014 .

Impact of skew and jitter on the performance of VLSI interconnects

Rajeevan Chandel, Gargi Khanna, Ashwani Kumar Chandel, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

A Network-on-Chip router for deadlock-free multicast mesh routing

Rajeevan Chandel, Philemon Daniel, Ritesh Rampal, 2015, 2015 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT).

A Flexible Programmable Memory BIST Architecture

Rajeevan Chandel, Philemon Daniel, 2010 .

Netlist bipartitioning using particle swarm optimisation technique

Rajeevan Chandel, Sandeep Singh Gill, Ashwani Kumar Chandel, 2012, Int. J. Artif. Intell. Soft Comput..

Analysis of SRAM cell designs for low power applications

Rajeevan Chandel, Chandresh Kumar Sharma, 2014, International Conference for Convergence for Technology-2014.

Genetic Algorithm Based Approach To Circuit Partitioning

Rajeevan Chandel, Sandeep Singh Gill, Ashwani Kumar Chandel, 2010 .

Performance analysis of CNTFET based digital logic circuits

Rajeevan Chandel, Sonal Shreya, 2014, 2014 Students Conference on Engineering and Systems.

Performance Analysis of Multilayer Graphene Nano-Ribbon in Current-Mode Signaling Interconnect System

Yash Agrawal, Girish Kumar Mekala, Rajeevan Chandel, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

Power Optimal Design of SRAM in 90 nm

Rajeevan Chandel, Dhirendra Kumar, Ravi Goel, 2012 .

Condition assessment of power transformers based on multi-attributes using fuzzy logic

Rajeevan Chandel, Ashwani Kumar Chandel, Chilaka Ranga, 2017 .

SPICE for Nano-regime VLSI Design - A Simulation Study

Rajeevan Chandel, Ashwani Kumar Chandel, R. Chandel, 2007 .

Performance Analysis of Top-Contact MLGNR Based Interconnects

Rajeevan Chandel, Rohit Dhiman, Ramesh Kumar, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Repeater Sizing for Cross-Talk Mitigation in Coupled VLSI Interconnects

Rajeevan Chandel, Gargi Khanna, Ashwani Kumar Chandel, 2013 .

Carbon Nanotube Based Delay Model For High Speed Energy Efficient on Chip Data Transmission Using: Current Mode Technique pdf

Rajeevan Chandel, Sunil Jadav, Munish Vashistah, 2014, ArXiv.

Repeater insertion in global interconnects in VLSI circuits

Rajeevan Chandel, R. P. Agarwal, Sankar Sarkar, 2005 .

Variability Analysis of Stochastic Parameters on the Electrical Performance of On-Chip Current-Mode Interconnect System

Yash Agrawal, Rajeevan Chandel, Rohit Dhiman, 2017 .

Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power Applications

Rajeevan Chandel, Ashutosh Nandi, 2010, J. Low Power Electron..

Compact models and computation of crosstalk for sub-threshold interconnect circuits

Rajeevan Chandel, Rohit Dhiman, R. Chandel, 2015 .

Delay analysis of a single voltage‐scaled‐repeater driven long interconnect

Rajeevan Chandel, R. P. Agarwal, Sankar Sarkar, 2005 .

Contemporary On-chip System Modeling using FDTD in Low Power Regime

Rutu Parekh, Yash Agrawal, Rajeevan Chandel, 2018, 2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS).

Swarm Intelligence based circuit partitioning

Rajeevan Chandel, S. S. Gill, Sandeep S. Gill, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

Dynamic Crosstalk Analysis in Coupled Interconnects for Ultra-Low Power Applications

Rajeevan Chandel, Rohit Dhiman, R. Chandel, 2015, Circuits Syst. Signal Process..

Subthreshold Interconnect Circuit Design

Rajeevan Chandel, Rohit Dhiman, 2015 .

Variation of Crosstalk with Transition Time and Skew on Global VLSI Interconnects

Rajeevan Chandel, Gargi Khanna, Ashwani Kumar Chandel, 2010 .

Study and Performance Analysis of Two Stage High Speed Operational Amplifier Using Indirect Compensation

Rajeevan Chandel, Puneet Goyal, Sunil Jadav, 2012 .

Performance analysis of SRAM cell designed using floating gate MOS

Neha Sharma, Rajeevan Chandel, 2017, 2017 International Conference on Inventive Communication and Computational Technologies (ICICCT).

Expert system for condition monitoring of power transformer using fuzzy logic

Rajeevan Chandel, Ashwani Kumar Chandel, Chilaka Ranga, 2017 .

An analysis of interconnect delay minimization by low-voltage repeater insertion

Rajeevan Chandel, R. P. Agarwal, Sankar Sarkar, 2007, Microelectron. J..

Implementation of Multi-Way Partitioning Algorithm

Rajeevan Chandel, Sandeep Singh Gill, Ashwani Kumar Chandel, 2013 .

Stability analysis of SRAM cell using CNT and GNR field effect transistors

Rajeevan Chandel, Neha Sharma, Parmjit Singh, 2017, 2017 Tenth International Conference on Contemporary Computing (IC3).

Fuzzy Logic Expert System for Optimum Maintenance of Power Transformers

Rajeevan Chandel, Ashwani Kumar Chandel, Chilaka Ranga, 2016 .

Performance Evaluation of MISISFET- TCAD Simulation

Rajeevan Chandel, Tarun Chaudhary, Gargi Khanna, 2012 .

Analysis of crosstalk in SWCNTs bundle and MWCNT interconnects for subthreshold circuits

Anil Kumar, Rajeevan Chandel, Rohit Dhiman, 2014, 2014 IEEE International Conference on Advanced Communications, Control and Computing Technologies.

Transition time considerations in repeater‐chains

Rajeevan Chandel, R. P. Agarwal, Sankar Sarkar, 2005 .

Design of Low-Power High-Gain Operational Amplifier for Bio-Medical Applications

Rajeevan Chandel, Ashish Singh, Ashwani Kumar Chandel, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Investigations on Short-Circuit Power Dissipation in Repeater Loaded VLSI Interconnects

Rajeevan Chandel, Sankar Sarkar, Ashwani Kumar Chandel, 2007, J. Low Power Electron..

Design of a Low Power Flip-Flop Using CMOS Deep Sub Micron Technology

Rajeevan Chandel, Surya Naik, R. Chandel, 2010, 2010 International Conference on Recent Trends in Information, Telecommunication and Computing.

High speed RLC equivalent RC delay model using normalized asymptotic function for global VLSI interconnects

Rajeevan Chandel, Sunil Jadav, Munish Vashishath, 2021, Microelectron. J..

Analysis of non‐ideal effects in coupled VLSI interconnects with active and passive load variations

Rajeevan Chandel, Gargi Khanna, Sankar Sarkar, 2009 .

Variability in Subthreshold Interconnects

Rajeevan Chandel, Rohit Dhiman, 2015 .

Reconfigurable Test Architecture for Online Concurrent Fault Detection, Diagnosis and Repair

Rajeevan Chandel, Philemon Daniel, 2012 .

Repeater stage timing analysis for VLSI resistive interconnects

Rajeevan Chandel, R. P. Agarwal, Sankar Sarkar, 2006 .

Timing and Stability Analysis of Carbon Nanotube Interconnects

Yash Agrawal, Girish Kumar Mekala, Rajeevan Chandel, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

A prominent unified crosstalk model for linear and sub-threshold regions in mixed CNT bundle interconnects

Yash Agrawal, Girish Kumar Mekala, Rajeevan Chandel, 2021, Microelectron. J..

Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects

Rajeevan Chandel, Rohit Dhiman, Ashish Singh, 2021, Integr..

Fixed-Point Divider Using Newton Raphson Division Algorithm

Rajeevan Chandel, Pawan Kumar Pandey, Dilip Singh, 2021, Lecture Notes in Electrical Engineering.

A Novel Co-Planar Five Input Majority Gate Design in Quantum-Dot Cellular Automata

Rajeevan Chandel, Animesh Srivastava, 2021 .

Variation tolerant and stability simulation of low power SRAM cell analysis using FGMOS

Rajeevan Chandel, Neha Sharma, 2021, Int. J. Model. Simul. Sci. Comput..

Crosstalk Analysis of Current-Mode Signalling-Coupled RLC Interconnects Using FDTD Technique

Yash Agrawal, Rajeevan Chandel, R. Chandel, 2016 .

An Efficient Crosstalk Model For Coupled Multiwalled Carbon Nanotube Interconnects

Yash Agrawal, Rajeevan Chandel, R. Chandel, 2018, IEEE Transactions on Electromagnetic Compatibility.

Comprehensive Model for High-Speed Current-Mode Signaling in Next Generation MWCNT Bundle Interconnect Using FDTD Technique

Yash Agrawal, Rajeevan Chandel, R. Chandel, 2016, IEEE Transactions on Nanotechnology.

Performance analysis of bulk driven MOSFET and CNFET for low voltage applications

Rajeevan Chandel, Ankit Soni, 2013, 2013 Nirma University International Conference on Engineering (NUiCONE).

Design and analysis of a novel automatic gain control pre-amplifier circuit for hearing aid device

Rajeevan Chandel, Rohit Dhiman, Rahul Kumar Singh, 2015, 2015 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT).

Mixed carbon nanotube bundle: Capacitance analysis and comparison with copper interconnect

Rajeevan Chandel, Rohit Dhiman, R. Chandel, 2011, 2011 International Conference on Emerging Trends in Electrical and Computer Technology.

Degradation Analysis of Different PV Modules After Prolonged Field Operation

Rajeevan Chandel, O. S. Sastry, B. Bandyopadhyay, 2011 .