Ming-Hwa Sheu

发表

A VLSI architecture design with lower hardware cost and less memory for separable 2-D discrete wavelet transform

Ming-Hwa Sheu, Ming-Der Shieh, Sheng-Wel Liu, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

The VLSI Design of Motion Adaptive De-interlacing with Horizontal and Vertical Motions Detection

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Fast image foreground object segmentation based on block texture for embedded system implementation

Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Kai Tsai, 2015 .

Vehicle Detection Algorithm Based on Modified Gradient Oriented Histogram Feature

Ming-Hwa Sheu, Wen-Kai Tsai, Sheng-Kai Lo, 2017 .

Region-Based Background Subtraction for Complex Sense on Embedded Platforms

Ming-Hwa Sheu, Chung-Chi Lin, Wen-Kai Tsai, 2012, 2012 Eighth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

An Efficient Foreground Object Detection Method Using a Color Cluster-Based Background Modeling Algorithm

Ming-Hwa Sheu, Wen-Kai Tsai, M. Sheu, 2016, 2016 International Symposium on Computer, Consumer and Control (IS3C).

A low-power VLSI architecture for the Viterbi decoder

Ming-Hwa Sheu, Ming-Der Shieh, Wann-Shyang Ju, 1997, Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg.

Erratum: Efficient Reverse Converter Design for New Adaptable Four-Moduli Set {2n+k, 2n + 1, 2n - 1, 22n + 1} [IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E96.A (2013) , No. 7 pp.1571-1578]

Ming-Hwa Sheu, Yuan-Ching Kuo, Su-Hon Lin, 2013 .

Feature Points Based Video Object Tracking for Dynamic Scenes and Its FPGA System Prototyping

Yin-Tsung Hwang, Ming-Hwa Sheu, Bing Cheng Tsai, 2014, 2014 Tenth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

Motion Adaptive De-interlacing with Horizontal and Vertical Motions Detection

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2005, PCM.

An Ultra-low-power True Single-phase Clocking Flip-flop with Improved Hold time Variation using Logic Structure Reduction Scheme

Ming-Hwa Sheu, Po-Yu Kuo, Ming-Yan Tsai, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem

Ming-Hwa Sheu, Ming-Der Shieh, Chien-Hsing Wu, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Efficient object motion detection based on RGB-D image

Yi-Hua Wang, Ming-Hwa Sheu, Chi-Chia Sun, 2015, 2015 IEEE International Conference on Consumer Electronics - Taiwan.

Real-time object detection system on PAC Duo platform

Shau-Yin Tseng, Ming-Hwa Sheu, I-Hsien Lee, 2010, 2010 2nd International Conference on Signal Processing Systems.

Fast Motion Object Detection Algorithm Using Complementary Depth Image on an RGB-D Camera

Yi-Hua Wang, Ming-Hwa Sheu, Chi-Chia Sun, 2017, IEEE Sensors Journal.

A Fast Non-Overlapping Multi-Camera People Re-Identification Algorithm and Tracking Based on Visual Channel Model

Ming-Hwa Sheu, Chi-Chia Sun, Yan-Kai Huang, 2019, IEICE Trans. Inf. Syst..

High-speed generation of LFSR signatures

Ming-Hwa Sheu, Ming-Der Shieh, Hsin-Fu Lo, 2000, Proceedings of the Ninth Asian Test Symposium.

A new VLSI design for adaptive frequency-detection based on the active oscillator

Ming-Hwa Sheu, Ho-En Liao, Shr-Shian Yang, 2000, Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434).

The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A hybrid pixel-based background model for image foreground object detection in complex sence

Ming-Hwa Sheu, Chung-Chi Lin, Wen-Kai Tsai, 2012, 2012 35th International Conference on Telecommunications and Signal Processing (TSP).

Intelligent Design for Sound Detection of Goblet Clinking

Ming-Hwa Sheu, Tzu-Hao Kuo, Ho-En Liao, 2018, 2018 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

Real-time FPGA architecture of extended linear convolution for digital image scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, 2008 International Conference on Field-Programmable Technology.

Efficient Block-Based Foreground Object Detection for Outdoor Scenes on Embedded SoC Platforms

Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Kai Tsai, 2012 .

Single image fog removal algorithm based on an improved dark channel prior method

Ming-Hwa Sheu, Chi-Chia Sun, Heng-Chi Lai, 2016, 2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

A pipelined architecture of fast modular multiplication for RSA cryptography

Ming-Hwa Sheu, Ming-Der Shieh, Chien-Hsing Wu, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

NEW REVERSE CONVERTER DESIGN FOR 4-MODULI SET {2²ⁿ, 2ⁿ⁺¹-1, 2ⁿ/²+1, 2ⁿ/²-1}

Yin-Tsung Hwang, Ming-Hwa Sheu, Siang-Min Siao, 2016 .

Low Power Multipliers Using Enhenced Row Bypassing Schemes

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2007, 2007 IEEE Workshop on Signal Processing Systems.

Moving Object Tracking Algorithm Design for Unmanned Aerial Vehicle Platform

Shin-Chi Lai, Ming-Hwa Sheu, Wen-Kai Tsai, 2018, 2018 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

High-Performance Local Dimming Algorithm and Its Hardware Implementation for LCD Backlight

Ming-Hwa Sheu, Jia-Ren Chang Chien, Shih-Chang Hsi, 2013, Journal of Display Technology.

EFFICIENT BLOCK-BASED DYNAMIC BACKGROUND MODELING AND FOREGROUND OBJECT DETECTION IN THE DCT DOMAIN

Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Kai Tsai, 2014 .

A Systematic Approach for Parallel CRC Computations

Chung-Ho Chen, Ming-Hwa Sheu, Ming-Der Shieh, 2001, J. Inf. Sci. Eng..

High-performance very large scale integration architecture design for various-ratio image scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, J. Electronic Imaging.

Fast Image Blending and Deghosting for Panoramic Video

Ming-Hwa Sheu, Jeng-Shyang Pan, Tzu-Hsiung Chen, 2013, 2013 Ninth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

High Dynamic Range Image Based on Block-Based Edge Strength for Embedded System Design

Ming-Hwa Sheu, Wen-Kai Tsai, Chang Jie Lai, 2014, 2014 Tenth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

Automatic Generation of Programmable Parallel CRC & Scrambler Designs

Yin-Tsung Hwang, Ming-Hwa Sheu, Jiun-Yan Chen, 2006, 2006 IEEE Workshop on Signal Processing Systems Design and Implementation.

Low-Power 19-Transistor True Single-Phase Clocking Flip-Flop Design Based on Logic Structure Reduction Schemes

Yin-Tsung Hwang, Ming-Hwa Sheu, Ming-Yan Tsai, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Non-overlapping multi-camera object tracking algorithm and system design

Ming-Hwa Sheu, Chi-Chia Sun, Jui-Yang Chi, 2017, 2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW).

Chip implementation of high-efficient light-emitting diode dimming driver for high-power light-emitting diode lighting system

Ming-Hwa Sheu, Shih-Chang Hsia, Sheng-Yueh Lai, 2015 .

Image Object Detection and Tracking Implementation for Outdoor Scenes on an Embedded Soc Platform

Shau-Yin Tseng, Ming-Hwa Sheu, Wen-Kai Tsai, 2009, 2009 Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

An Efficient Architecture of Extended Linear Interpolation for Image Processing

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2010, J. Inf. Sci. Eng..

VLSI architecture design for a fast parallel label assignment in binary image

Ping-Kuo Weng, Ming-Hwa Sheu, Shyue-Wen Yang, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Parallel 3-Pixel Labeling Method and its Hardware Architecture Design

Shau-Yin Tseng, Ming-Hwa Sheu, Shyue-Wen Yang, 2009, 2009 Fifth International Conference on Information Assurance and Security.

Single-ended structure sense-amplifier-based flip-flop for low-power systems

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2015 .

A Low Complexity Low Power Signal Transition Detector Design for Self-Timed Circuits

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A new fall detection algorithm based on depth information using RGB-D camera

Ming-Hwa Sheu, Chi-Chia Sun, Yu-Cheng Syu, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

An ASIC design for linear predictive coding of speech signals

Jhing-Fa Wang, Ming-Hwa Sheu, Yuan-Long Jeang, 1992, Proceedings Euro ASIC '92.

A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

Efficient VLSI Design for RNS Reverse Converter Based on New Moduli Set (2n-1, 2n+1, 22n+1)

Ming-Hwa Sheu, Su-Hon Lin, Jing-Shiun Lin, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

A novel adaptive algorithm and VLSI design for frequency detection in noisy environment based on adaptive IIR filter

Ming-Hwa Sheu, Ming-Der Shieh, Ho-En Liao, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

An efficient convolution interpolation kernel for digital image scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, IEICE Electron. Express.

High efficient hardware allocation framework of arbitrary inverse transform coding blocks in H.265

Ming-Hwa Sheu, Chi-Chia Sun, Mladen Berekovic, 2015, 2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

A parallel architecture for arithmetic coding and its VLSI implementation

Ming-Hwa Sheu, Chien-Hsing Wu, Leu-Shing Lan, 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

Auto tracking DC/DC converter for adaptive LED driving system

Ming-Hwa Sheu, Shih-Chang Hsia, Kuan-Cheng Chen, 2017, 2017 IEEE Wireless Power Transfer Conference (WPTC).

Object detection using adaptive block-based background model

Ming-Hwa Sheu, Chi-Chia Sun, Wen-Kai Tsai, 2016, 2016 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

VLSI architecture of extended in-place path metric update for Viterbi decoders

Chien-Ming Wu, Ming-Hwa Sheu, Ming-Der Shieh, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Efficient VLSI Design of Modulo 2n-1 Adder Using Hybrid Carry Selection

Ming-Hwa Sheu, Su-Hon Lin, Jun-Jie Zhu, 2007, 2007 IEEE Workshop on Signal Processing Systems.

An architecture with low memory-bandwidth and less hardware cost for 3SBM algorithm

Jhing-Fa Wang, Ming-Hwa Sheu, Jau-Yien Lee, 1993, Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation.

A high throughput-rate architecture for 8*8 2D DCT

Jhing-Fa Wang, Ming-Hwa Sheu, An-Nan Suen, 1993, 1993 IEEE International Symposium on Circuits and Systems.

A Novel Flexible 3-D Heterogeneous Integration Scheme Using Electroless Plating on Chips With Advanced Technology Node

Ming-Hwa Sheu, Yu-Chen Hu, Yao-Jen Chang, 2015, IEEE Transactions on Electron Devices.

Efficient VLSI architecture design for complex linear convolution using conjugate-polynomial-channel residue arithmetic system

Ming-Hwa Sheu, Shyue-Wen Yang, Su-Hon Lin, 2004, The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings..

A low-cost VLSI architecture design for non-separable 2-D discrete wavelet transform

Ming-Hwa Sheu, Ming-Der Shieh, Sheng-Wei Liu, 1997, Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg.

Area-Time Efficient Modulo 2n - 1 Adder Design Using Hybrid Carry Selection

Ming-Hwa Sheu, Su-Hon Lin, 2008, IEICE Trans. Inf. Syst..

New Reverse Converter Design of Moduli Set {2n, 2n+1-1, 2n-1}

Ming-Hwa Sheu, Yuan-Ching Kuo, Siang-Min Siao, 2011, 2011 Second International Conference on Innovations in Bio-inspired Computing and Applications.

A micro-network on chip with 10-Gb/s transmission link

Wei-Chang Liu, Shyh-Jye Jou, Chih-Hsien Lin, 2009, 2009 IEEE Asian Solid-State Circuits Conference.

A new low-complexity approximate DCT for image and video compression

Ming-Hwa Sheu, Chi-Chia Sun, Hsin-Kun Lin, 2020 .

Low-power state assignment for asynchronous finite state machines

Ming-Hwa Sheu, Ming-Der Shieh, Wann-Shyang Ju, 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

A robust background modeling and foreground object detection using color component analysis

Ming-Hwa Sheu, Chung-Chi Lin, Wen-Kai Tsai, 2012, 2012 IEEE International Conference on Systems, Man, and Cybernetics (SMC).

New adaptable three-moduli set {2n+k, 2n - 1, 2n-1 - 1} for residue number system-based finite impulse response implementation

Yin-Tsung Hwang, Ming-Hwa Sheu, Chi-Chia Sun, 2016, IEICE Electron. Express.

The Image Shape Recovery on Communication Data Lost Damage

Ming-Hwa Sheu, Shih-Chang Hsia, Cheng Hung Hsiao, 2019, 2019 Eleventh International Conference on Ubiquitous and Future Networks (ICUFN).

The VLSI Design of Winscale for Digital Image Scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2007, Third International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007).

Low power 10-transistor full adder design based on degenerate pass transistor logic

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Efficient VLSI Design of Residue-to-Binary Converter for the Moduli Set (2n, 2n+1 - 1, 2n - 1)

Ming-Hwa Sheu, Su-Hon Lin, Chao-Hsiang Wang, 2008, IEICE Trans. Inf. Syst..

A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

FPGA implementation for image object detection system on NoCs

Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Sheng Huang, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

A lossless index coding algorithm and VLSI design for vector quantization

Ming-Hwa Sheu, Ming-Der Shieh, Sh-Chi Tsai, 1999, AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360).

Low Power Multiplier Designs Based on Improved Column Bypassing Schemes

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Low Power Pulse Generator Design Using Hybrid Logic

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Asynchronous implementation of modular exponentiation for RSA cryptography

Ming-Hwa Sheu, Ming-Der Shieh, Chien-Hsing Wu, 2000, Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434).

Edge-based moving object tracking algorithm for an embedded system

Ming-Hwa Sheu, Kai Xiang Yang, 2016, 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Fast First-Order Polynomials Convolution Interpolation for Real-Time Digital Image Reconstruction

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2010, IEEE Transactions on Circuits and Systems for Video Technology.

A Computation Efficiency AND-CFAR for FMCW Radar Receiver

Ming-Hwa Sheu, Guan-Yu Lin, Siang-Min Siao, 2013, 2013 Ninth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

A Low-cost VLSI Design of Extended Linear Interpolation for Real Time Digital Image Processing

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, 2008 International Conference on Embedded Software and Systems.

Low Complexity and Low Power Sense-Amplifier Based Flip-Flop Design

Ming-Hwa Sheu, Po-Yu Kuo, Jin-Fa Lin, 2019, IEICE Trans. Electron..

Efficient VLSI design of a reverse RNS converter for new flexible 4-moduli set (2p+k, 2p+1, 2p−1, 22p+1)

Ming-Hwa Sheu, Yuan-Ching Kuo, Su-Hon Lin, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A unified VLSI architecture for decomposition and synthesis of discrete wavelet transform

Ming-Hwa Sheu, Ming-Der Shieh, Shun-Fa Cheng, 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

Efficient Reverse Converter Design for New Adaptable Four-Moduli Set {2n + k, 2n + 1, 2n - 1, 22n + 1}

Ming-Hwa Sheu, Yuan-Ching Kuo, Su-Hon Lin, 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Efficient Multi-Layer Background Model on Complex Environment for Foreground Object Detection

Ming-Hwa Sheu, Chung-Chi Lin, Wen-Kai Tsai, 2010, 2010 Sixth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

The determination of the cycle length in high level synthesis

Jhing-Fa Wang, Ming-Hwa Sheu, Yuan-Long Jeang, 1993, Integr..

An expandable chip design for gray-scale morphological operations

Jhing-Fa Wang, Ming-Hwa Sheu, Jau-Yien Lee, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2n,2n+1−1,2n−1)

Ming-Hwa Sheu, Yuan-Ching Kuo, Su-Hon Lin, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

An efficient VLSI design for a residue to binary converter for general balance moduli (2n-3, 2n+1, 2n-1, 2n+3)

Ming-Hwa Sheu, Chichyang Chen, Shyue-Wen Yang, 2004, IEEE Trans. Circuits Syst. II Express Briefs.

A fast additive normalization method for exponential computation

Ming-Hwa Sheu, Rui-Lin Chen, Chichyang Chen, 2003, Euromicro Symposium on Digital System Design, 2003. Proceedings..

A data-reuse architecture for gray-scale morphologic operations

Jhing-Fa Wang, Ming-Hwa Sheu, Yuan-Long Jeang, 1992 .

Low Complexity Dual-Mode Pulse Generator Designs

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Block-Based Major Color Method for Foreground Object Detection on Embedded SoC Platforms

Ming-Hwa Sheu, Chung-Chi Lin, Wen-Kai Tsai, 2012, IEEE Embedded Systems Letters.

A low power dual-mode pulse triggered flip-flop using pass transistor logic

Ming-Hwa Sheu, Jin-Fa Lin, Peng-Siang Wang, 2010, 2010 International Symposium on Next Generation Electronics.

Extendable multi-pixel object labeling for digital image

Ming-Hwa Sheu, Shyue-Wen Yang, Tzu-Hsiung Chen, 2015, 2015 IEEE International Conference on Consumer Electronics - Taiwan.

Implementation of FPGA-based Accelerator for Deep Neural Networks

Ming-Hwa Sheu, Tsung-Han Tsai, Yuan-Chen Ho, 2019, 2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Directional interpolation for field-sequential stereoscopic video

Ming-Hwa Sheu, Hsien-Huang P. Wu, Tung-Yu Yang, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Film-to-Video Conversion with Scene Cut Detection

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2006, First International Conference on Innovative Computing, Information and Control - Volume I (ICICIC'06).

A high-performance VLSI architecture for MAPS criterion motion estimation

Yu-Chin Hsu, Ming-Hwa Sheu, Ming-Der Shieh, 1997, Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg.

NEW EFFICIENT REVERSE CONVERTER FOR 3-MODULI SET {2²ⁿ,2ⁿ+1,2ⁿ-1} BASED ON NEW CRT-I

Ming-Hwa Sheu, Yuan-Ching Kuo, Siang-Min Siao, 2015 .

Fast Texture-Based Object Tracking Algorithm on Embedded Platform

Ming-Hwa Sheu, Wen-Kai Tsai, Chuang-Chun Hu, 2010, 2010 Fifth International Conference on Frontier of Computer Science and Technology.

A high speed and energy efficient full adder design using complementary & level restoring carry logic

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2006, 2006 IEEE International Symposium on Circuits and Systems.

High-accuracy background model for real-time video foreground object detection

Ming-Hwa Sheu, Wen-Kai Tsai, Chung-chi Lin, 2012 .

Arrow-Pointer Sensor Design for Low-Cost Water Meter

Ming-Hwa Sheu, Yu-Jui Chang, Shih-Chang Hsia, 2013, IEEE Sensors Journal.

Fast Fair Crossbar Scheduler for On-chip Router

Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Kai Tsai, 2007, 2007 IEEE International Symposium on Circuits and Systems.

VLSI Design of Diminished-One Modulo $2^{n}+1$ Adder Using Circular Carry Selection

Ming-Hwa Sheu, Su-Hon Lin, M. Sheu, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

An efficient approach for in-place scheduling of path metric update in Viterbi decoders

Chien-Ming Wu, Ming-Hwa Sheu, Ming-Der Shieh, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Fast image moving object segmentation based on block texture for embedded system implementation

Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Kai Tsai, 2012, 2012 International Symposium on Intelligent Signal Processing and Communications Systems.

A High-Speed Network Interface Design for Packet-Based NoC

Yin-Tsung Hwang, Ming-Hwa Sheu, Shyue-Wen Yang, 2006, 2006 International Conference on Communications, Circuits and Systems.

A High-Performance Architecture of Motion Adaptive De-interlacing with Reliable Interfield Information

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2007, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Efficient Color-Ingredient Particle Filter for Video Object Tracking

Ming-Hwa Sheu, Wen-Kai Tsai, Ho-En Liao, 2011, 2011 Second International Conference on Innovations in Bio-inspired Computing and Applications.

Fast design approach for implementing the approximate squaring function

Ming-Hwa Sheu, Su-Hon Lin, 2002, Asia-Pacific Conference on Circuits and Systems.

Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa Lin, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

High-performance reverse converter design for the new four-moduli Set {22n, 2n+1, 2n/2+1, 2n/2-1}

Ming-Hwa Sheu, Shao-Yu Wang, Siang-Min Siao, 2017, 2017 IEEE Conference on Dependable and Secure Computing.

The VLSI design of de-interlacing with scene change detection

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Low-Power and Low-Complextly Full Adder Design for Wireless Base Band Application

Yin-Tsung Hwang, Ming-Hwa Sheu, Jin-Fa lin, 2006, 2006 International Conference on Communications, Circuits and Systems.

Ultra Low Power Circuit Design Based on Adiabatic Logic

Ming-Hwa Sheu, Chi-Chia Sun, Cheng Chih Wang, 2014, 2014 Tenth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

An efficient hardware design approach from system-level specification

Ming-Hwa Sheu, Ming-Der Shieh, Sheng-Wei Liu, 1997, Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg.

High-speed and reduced-area RNS forward converter based on (2/sup n/ -1, 2/sup n/, 2/sup n/ +1) moduli set

Ming-Hwa Sheu, Yu-Chun Chang, Su-Hon Lin, 2004, The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings..

A new approach for operation scheduling with data flow graph reforming

Jhing-Fa Wang, Ming-Hwa Sheu, Jau-Yien Lee, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Fast-transient high-voltage buck-boost DC-DC conversion with low overshoot

Ming-Hwa Sheu, Shih-Chang Hsia, Jhih-Jian Jhou, 2021, Microelectron. J..

Font-End Integrated Circuit Design for Plant Physiological Sensing

Wen-Ho Juang, Ming-Hwa Sheu, Shin-Chi Lai, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications

Ming-Hwa Sheu, Shih-Chang Hsia, Jin-Fa Lin, 2021, Sensors.

AIoT-based Audio Recognition System for Smart Home Applications

Ming-Hwa Sheu, Szu-Hong Wang, Hao-Ting Pai, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

Software and Hardware Integration System Design with Fruit Identification for Smart Electronic Scale Applications

Ming-Hwa Sheu, Szu-Hong Wang, Wei-Yu Zhu, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

Stable Local Bit-Line 6 T SRAM Architecture Design for Low-Voltage Operation and Access Enhancement

Ming-Hwa Sheu, Ya-Hsin Hsueh, Shih-Chang Hsia, 2021, Electronics.

UAV Object Tracking Application Based on Patch Color Group Feature on Embedded System

Ming-Hwa Sheu, Chi-Chia Sun, Shin-Chi Lai, 2021, Electronics.

FGSC: Fuzzy Guided Scale Choice SSD Model for Edge AI Design on Real-Time Vehicle Detection and Class Counting

Ming-Hwa Sheu, Shih-Chang Hsia, Jia-Xiang Zheng, 2021, Sensors.

A Novel Bird Detection and Identification based on DPU processor on PYNQ FPGA

Ming-Hwa Sheu, Chi-Chia Sun, Po-Yu Kuo, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

Real-time Stereo Television Broadcasting System

Ming-Hwa Sheu, Shih-Chang Hsia, Szu-Hong Wang, 2021, 2021 IEEE International Conference on Consumer Electronics (ICCE).

Embedded Temperature Sensor for Multilevel Current LED Driver

Ming-Hwa Sheu, Shih-Chang Hsia, Sheng-Yueh Lai, 2014, IEEE Sensors Journal.

Fast compensative design approach for the approximate squaring function

Ming-Hwa Sheu, Su-Hon Lin, 2002 .

3D heterogeneous integration structure based on 40 nm- and 0.18 µm-technology nodes

Yu-Sheng Hsieh, Ming-Hwa Sheu, Chun-Pin Lin, 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

High-speed and Reduced-Area RNS Forward Converter Based on (2"-1,2", 2"+1) Moduli Set

Ming-Hwa Sheu, Su-Hon Lin, Yu-Chun Chang, 2004 .

MAPS: a new and efficient block-matching criterion for motion estimation

Yu-Chin Hsu, Ming-Hwa Sheu, Ming-Der Shieh, 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.