Y. Ohtomo

发表

Wide Dynamic Range and High Sensitivity APD Burst Receiver Configuration based on M-Switching Technique for 10GEPON System

N. Yoshimoto, Y. Fukada, K.-I. Suzuki, 2007, LEOS 2007 - IEEE Lasers and Electro-Optics Society Annual Meeting Conference Proceedings.

A single-chip 3.5 Gb/s CMOS/SIMOX transceiver with automatic-gain-control and automatic-power-control circuits

Y. Ohtomo, T. Yoshida, M. Nishisaka, 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

A 250-Mb/s, 700-mW, 32-highway*8-b S/P converter LSI with cross-access memory

M. Suzuki, Y. Ohtomo, 1992 .

A 10 Gb/s (1.25 Gb/sx8) 4/spl times/2 CMOS/SIMOX ATM switch

E. Oki, Y. Ohtomo, N. Yamanaka, 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

Session 12 overview - optical communications

Y. Ohtomo, L. DeVito, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

ESD protection in fully-depleted CMOS/SIMOX with a tungsten-clad source/drain

Y. Ohtomo, M. Shimaya, H. Koizumi, 2000, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476).

A 10-Gb/s (1.25 Gb/s×8)4×2 0.25-μm CMOS/SIMOX ATM switch based on scalable distributed arbitration

Eiji Oki, Naoaki Yamanaka, Ryusuke Kawano, 1999, IEEE J. Solid State Circuits.

A SiGe BiCMOS burst-mode transimpedance amplifier using fast and accurate automatic offset compensation technique for 1G/10G dual-rate transceiver

M. Nakamura, T. Kurosaki, S. Nishihara, 2009, 2009 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

A 10-Gbit/s CMOS-burst-mode clock and data recovery IC for a WDM/TDM-PON access network

K. Kumozaki, S. Kimura, S. Nishihara, 2004, The 17th Annual Meeting of the IEEELasers and Electro-Optics Society, 2004. LEOS 2004..

Low power Gb/s CMOS interfaces

Y. Ohtomo, M. Nogawa, 1995, Digest of Technical Papers., Symposium on VLSI Circuits..

FIFO and Time Slot Converter for High-Speed Data Transmission

M. Suzuki, Y. Ohtomo, 1991, 1991 Symposium on VLSI Circuits.

A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13/spl mu/m CMOS

T. Kawamura, Y. Ohtomo, M. Togashi, 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

Burst-mode optical receiver ICs for broadband access networks

M. Nakamura, T. Kurosaki, S. Nishihara, 2010, 2010 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM).

Small and low-cost dual-rate optical triplexer for 10G-EPON OLT transceivers

M. Nakamura, A. Ohki, H. Sanjoh, 2012, 2012 17th Opto-Electronics and Communications Conference.

Design technologies for 0.25 μm gate-array LSIs

Y. Ohtomo, H. Suto, K. Nishimura, 1997 .

A 12.5-Gb/s Parallel Phase Detection Clock and Data Recovery Circuit in 0.13-$muhbox m$CMOS

K. Nishimura, Y. Ohtomo, M. Nogawa, 2006, IEEE Journal of Solid-State Circuits.

A 12.5Gb/s CMOS BER test using a jitter-tolerant parallel CDR

T. Kawamura, K. Nishimura, Y. Ohtomo, 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

A 10.3 Gb/s Burst-Mode CDR Using a ΔΣ DAC

N. Yoshimoto, S. Kimura, J. Terada, 2008, IEEE Journal of Solid-State Circuits.

A Burst-Mode 3R Receiver for 10-Gbit/s PON Systems With High Sensitivity, Wide Dynamic Range, and Fast Response

S. Kimura, T. Imai, N. Yoshimoto, 2008, Journal of Lightwave Technology.

A 40 Gb/s 8/spl times/8 ATM switch LSI using 0.25 /spl mu/m CMOS/SIMOX

K. Yamakoshi, T. Watanabe, Y. Ohtomo, 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

A low-power multi-gigabit CMOS/SIMOX LSI design using two power supply voltages

Y. Ohtomo, M. Shimaya, H. Sawada, 1999, 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).

A 10G Burst-Mode PIN-TIA Module with 10-nsec Response for PON Systems

N. Yoshimoto, S. Kimura, S. Nishihara, 2007, LEOS 2007 - IEEE Lasers and Electro-Optics Society Annual Meeting Conference Proceedings.

A 16.3-GHz 64:1 CMOS frequency divider

Y. Ohtomo, M. Nogawa, 2000, Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434).

Burst-mode APD-ROSA using reset signal for 1G/10G-dual-rate OLT optical transceiver

T. Kurosaki, Susumu Nishihara, Y. Ohtomo, 2009, 2009 14th OptoElectronics and Communications Conference.

A novel p-i-n photodetector fabricated on SIMOX for 1 GHz 2 V CMOS OEICs

Y. Ohtomo, M. Shimaya, T. Yoshida, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).