Jose Flores

A 1.25GHz 0.8W C66x DSP Core in 40nm CMOS

Daniel Wu, Jonathan Tran, David Thompson, 2012, 2012 25th International Conference on VLSI Design.

Reconfigurable array media processor (RAMP)

Poras T. Balsara, Patrick Friel, Kamlesh Rath, 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

Cooperative Distance Learning with an Integrated System for Computer Assisted Laboratory Work

José Bravo, Francisco Ruiz, Manuel Ortega, 1996, CALISCE.

A 800 MHz system-on-chip for wireless infrastructure applications

Kyle Castille, Luong Nguyen, Peter Groves, 2004, 17th International Conference on VLSI Design. Proceedings..

A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure

Rajasekhar Velamuri, Sridhar Krishnan, Anand Rajaram, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.