S. Kawahito

A compressed digital output CMOS image sensor with analog 2-D DCT processors and ADC/quantizer

A. Matsuzawa, M. Yoshida, S. Kawahito, 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

A parallel signal processing technique using MOS current-mode analog circuits for smart image sensors

S. Kawahito, J. Takahashi, M. Ashiki, 1991, TRANSDUCERS '91: 1991 International Conference on Solid-State Sensors and Actuators. Digest of Technical Papers.

VLSI-oriented bi-directional current-mode arithmetic circuits based on the Radix-4 signed-digit number system

S. Kawahito, S. Kawahito, 1986 .

A binocular CMOS range image sensor with bit-serial block-parallel interface using cyclic pipelined ADCs

S. Kawahito, K. Kobayashi, T. Kato, 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).

A CMOS integrated circuit for multichannel multiple-subject biotelemetry using bidirectional optical transmissions [weightlessness in space effects application]

T. Nakamura, S. Kawahito, S. Usui, 1994, IEEE Transactions on Biomedical Engineering.

A New Three-Dimensional Multiport Memory for Shared Memory in High Performance Parallel Processor System

Mitsumasa Koyanagi, Nobuaki Miyakawa, S. Kawahito, 1996 .