Catherine H. Gebotys

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The Catree Architectural Synthesis with Testability

Catherine H. Gebotys, Mohamed I. Elmasry, 1991 .

SARFUM: Security Architecture for Remote FPGA Update and Monitoring

Lionel Torres, Catherine H. Gebotys, Benoît Badrignans, 2010, TRETS.

Integration of algorithmic VLSI synthesis with testability incorporation

Catherine H. Gebotys, Mohamed I. Elmasry, C. Gebotys, 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

Analysis of Dynamic Laser Injection and Quiescent Photon Emissions on an Embedded Processor

Catherine H. Gebotys, Haohao Liao, Karim Amin, 2020, J. Hardw. Syst. Secur..

EM analysis of a wireless Java-based PDA

Catherine H. Gebotys, Brian A. White, 2008, TECS.

Algebraic Fault Attack on SHA Hash Functions Using Programmatic SAT Solvers

Catherine H. Gebotys, Saeed Nejati, Jan Horácek, 2018, CP.

An Approach for Recovering Satellites and their Cryptographic Capabilities in the Presence of SEUs and Attacks

Catherine H. Gebotys, Marcio Juliato, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

Special Session: Security on SoC

Srivaths Ravi, Hiroto Yasuura, Catherine H. Gebotys, 2002, ISSS.

Efficient Technique for the FPGA Implementation of the AES MixColumns Transformation

Catherine H. Gebotys, Reouven Elbaz, Solmaz Ghaznavi, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis

Catherine H. Gebotys, Grant Martin, 2008 .

A table masking countermeasure for low-energy secure embedded systems

Catherine H. Gebotys, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Methodology for attack on a Java-based PDA

Catherine H. Gebotys, Brian A. White, 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).

Application-specific architectures for field-programmable VLSI technologies

Catherine H. Gebotys, Robert J. Gebotys, 1994, 1994 Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences.

The Influence of DSP Processor Architectures on Code Compilation Difficulties

Catherine H. Gebotys, 2000 .

Optimizing Energy During Systems Synthesis of Computer Intensive Realtime Applications

Catherine H. Gebotys, 1998, VLSI Design.

A global optimization approach for architectural synthesis

Mohamed I. Elmasry, Catherine H. Gebotys, C. Gebotys, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Testability In Architectural Synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, 1991 .

Changing Interaction of Compiler and Architecture

Mahmut T. Kandemir, Michael D. Smith, Rudolf Eigenmann, 1997, Computer.

A minimum-cost circulation approach to DSP address-code generation

Catherine H. Gebotys, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A Propagation Rate Based Splitting Heuristic for Divide-and-Conquer Solvers

Pascal Poupart, Catherine H. Gebotys, Jia Hui Liang, 2017, SAT.

Optimal scheduling and allocation of embedded VLSI chips

Catherine H. Gebotys, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

Power minimization derived from architectural-usage of VLIW processors

Catherine H. Gebotys, Robert J. Gebotys, S. Wiratunga, 2000, Proceedings 37th Design Automation Conference.

Security-driven exploration of cryptography in DSP cores

Catherine H. Gebotys, 2002, 15th International Symposium on System Synthesis, 2002..

Current flattening in software and hardware for security applications

Catherine H. Gebotys, Radu Muresan, 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

Current consumption dynamics at instruction and program level for a VLIW DSP processor

Catherine H. Gebotys, Radu Muresan, 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

Synthesizing Embedded Speed-optimized Architectures

Catherine H. Gebotys, C. Gebotys, 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

EM alignment using phase for secure embedded systems

Catherine H. Gebotys, Brian A. White, 2008, Des. Autom. Embed. Syst..

Fast Multibase Methods and Other Several Optimizations for Elliptic Curve Scalar Multiplication

Patrick Longa, Catherine H. Gebotys, 2009, IACR Cryptol. ePrint Arch..

Synthesis of throughput-optimized multichip architectures

Catherine H. Gebotys, 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

Novel Precomputation Schemes for Elliptic Curve Cryptosystems

Patrick Longa, Catherine H. Gebotys, C. Gebotys, 2009, ACNS.

An Energy-Efficient Image Representation for Secure Mobile Systems

Sagar Naik, Catherine H. Gebotys, Tim Woo, 2005, NETWORKING.

Optimal synthesis of high performance architectures

Catherine H. Gebotys, Mohamed I. Elmasry, 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

An efficient model for DSP code generation: performance, code size, estimated energy

Catherine H. Gebotys, 1997, Proceedings. Tenth International Symposium on System Synthesis (Cat. No.97TB100114).

Modeling and applications of current dynamics in a complex processor core

Catherine H. Gebotys, Radu Muresan, C. Gebotys, 2003 .

Introduction to Secure Embedded Systems

Catherine H. Gebotys, 2010 .

Design of secure cryptography against the threat of power-attacks in DSP-embedded processors

Catherine H. Gebotys, 2004, TECS.

Preaveraging and Carry Propagate Approaches to Side-Channel Analysis of HMAC-SHA256

Catherine H. Gebotys, Brian A. White, Edgar Mateos, 2016, ACM Trans. Embed. Comput. Syst..

Synthesizing optimal registerfile architectures for FPGA technology

Catherine H. Gebotys, 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

Optimal mapping of DSP application to architectures

Catherine H. Gebotys, R. J. Gebotys, 1993, [1993] Proceedings of the Twenty-sixth Hawaii International Conference on System Sciences.

Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor

Catherine H. Gebotys, Robert J. Gebotys, C. Gebotys, 2002, CHES.

Security in Embedded Devices

Catherine H. Gebotys, 2009 .

Instantaneous current modeling in a complex VLIW processor core

Catherine H. Gebotys, Radu Muresan, C. Gebotys, 2005, TECS.

A new correlation frequency analysis of the side channel

Catherine H. Gebotys, Edgar Mateos, 2010, WESS '10.

Data Integrity and Message Authentication

Catherine H. Gebotys, 2010 .

A split-mask countermeasure for low-energy secure embedded systems

Catherine H. Gebotys, 2006, TECS.

Low energy memory and register allocation using network flow

Catherine H. Gebotys, 1997, DAC.

An optimal methodology for synthesis of DSP multichip architectures

Catherine H. Gebotys, C. Gebotys, 1995, J. VLSI Signal Process..

Reliable Testable Secure Systems

Catherine H. Gebotys, 2010 .

Global VLSI Design Cycle

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

Optimal VLSI Architectural Synthesis: Area, Performance and Testability

Catherine H. Gebotys, Mohamed I. Elmasry, C. Gebotys, 1991 .

Side channel aware leakage management in nanoscale Cryptosystem-on-Chip (CoC)

Catherine H. Gebotys, Amir Khatib Zadeh, 2009, 2009 10th International Symposium on Quality Electronic Design.

Tailoring a Reconfigurable Platform to SHA-256 and HMAC through Custom Instructions and Peripherals

Catherine H. Gebotys, Marcio Juliato, C. Gebotys, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

EM Fault Injection on ARM and RISC-V

Catherine H. Gebotys, Haohao Liao, Mahmoud A. Elmohr, 2020, 2020 21st International Symposium on Quality Electronic Design (ISQED).

A Phase Substitution Technique for DEMA of Embedded Cryptographic Systems

Catherine H. Gebotys, Brian A. White, 2007, Fourth International Conference on Information Technology (ITNG'07).

Oasic Synthesis Results

Catherine H. Gebotys, Mohamed I. Elmasry, 1991 .

Cost constrained optimal architectural synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, 1991, 28th ACM/IEEE Design Automation Conference.

Integrated design and test synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, C. Gebotys, 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

Network Flow Approach to Data Regeneration for Low Energy Embedded System Synthesis

Catherine H. Gebotys, 1998, Integr. Comput. Aided Eng..

Forward-Secure Content Distribution to Reconfigurable Hardware

Lionel Torres, Ruby B. Lee, Catherine H. Gebotys, 2008, 2008 International Conference on Reconfigurable Computing and FPGAs.

Summary and Future Research

Catherine H. Gebotys, Mohamed I. Elmasry, 1991 .

Support for Algorithmic Constructs

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines

Lionel Torres, Ruby B. Lee, Catherine H. Gebotys, 2009, Trans. Comput. Sci..

Analysis of Efficient Techniques for Fast Elliptic Curve Cryptography on x86-64 based Processors

Patrick Longa, Catherine H. Gebotys, C. Gebotys, 2010, IACR Cryptol. ePrint Arch..

Low energy security optimization in embedded cryptographic systems

Catherine H. Gebotys, 2004, CODES+ISSS '04.

Low energy memory component design for cost-sensitive high performance embedded systems

Catherine H. Gebotys, 1996, Proceedings of Custom Integrated Circuits Conference.

A network flow approach to memory bandwidth utilization in embedded DSP core processors

Catherine H. Gebotys, 2002, IEEE Trans. Very Large Scale Integr. Syst..

Where Security Began

Catherine H. Gebotys, 2010 .

Low-Power Software Techniques

Catherine H. Gebotys, 2005 .

A methodology for secure recovery of spacecrafts based on a trusted hardware platform

Catherine H. Gebotys, Marcio Juliato, 2017 .

Simultaneous Scheduling, and Selection and Allocation of Functional Units

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

A Sliding Window Phase-Only Correlation Method for Side-Channel Alignment in a Smartphone

Catherine H. Gebotys, Brian A. White, 2015, TECS.

Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model

Catherine H. Gebotys, Radu Muresan, 2001, VLSI-SOC.

Security wrappers and power analysis for SoC technology

Y. Zhang, Catherine H. Gebotys, 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

Integration of algorithmic VLSI synthesis with testability incorporation

Catherine H. Gebotys, Mohamed I. Elmasry, 1989 .

State of the Art Synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors

Catherine H. Gebotys, Robert J. Gebotys, 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

Optimal VLSI Architectural Synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

Leakage Power and Side Channel Security of Nanoscale Cryptosystem-on-Chip (CoC)

Catherine H. Gebotys, Amir Khatib Zadeh, 2009, 2009 IEEE Computer Society Annual Symposium on VLSI.

An optimization approach to the synthesis of multichip architectures

Catherine H. Gebotys, C. Gebotys, 1994, IEEE Trans. Very Large Scale Integr. Syst..

DSP address optimization using a minimum cost circulation technique

Catherine H. Gebotys, 1997, ICCAD 1997.

Performance-power optimization of memory components for complex embedded systems

Catherine H. Gebotys, Robert J. Gebotys, C. Gebotys, 1997, Proceedings of the Thirtieth Hawaii International Conference on System Sciences.

Designing for low power in complex embedded DSP systems

Catherine H. Gebotys, Robert J. Gebotys, 1999, Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences. 1999. HICSS-32. Abstracts and CD-ROM of Full Papers.

Side Channel Attacks on the Embedded System

Catherine H. Gebotys, 2010 .

Editorial Introduction of New Associate Editors

Catherine H. Gebotys, Krithi Ramamritham, 2013, IEEE Embed. Syst. Lett..

Utilizing memory bandwidth in DSP embedded processors

Catherine H. Gebotys, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Adaptive Restart and CEGAR-Based Solver for Inverting Cryptographic Hash Functions

Krzysztof Czarnecki, Catherine H. Gebotys, Jia Hui Liang, 2016, VSTTE.

Global optimization approach for architectural synthesis

Mohamed I. Elmasry, Catherine H. Gebotys, C. Gebotys, 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Enhanced Current-Balanced Logic (ECBL): An Area Efficient Solution to Secure Smart Cards against Differential Power Attack

Catherine H. Gebotys, Amir Khatib Zadeh, 2007, Fourth International Conference on Information Technology (ITNG'07).

Throughput optimized architectural synthesis

Catherine H. Gebotys, 1993, IEEE Trans. Very Large Scale Integr. Syst..

A Methodology for Architectural Synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

Summary, Standards, and Ongoing Efforts

Catherine H. Gebotys, 2010 .

Symmetric Key Protocols Including Ciphers

Catherine H. Gebotys, C. Gebotys, 2010 .

Faster Explicit Formulas for Computing Pairings over Ordinary Curves

Patrick Longa, Catherine H. Gebotys, Julio César López-Hernández, 2011, EUROCRYPT.

Optimal synthesis of multichip architectures

Catherine H. Gebotys, 1992, ICCAD.

Power minimization in heterogeneous processing

Catherine H. Gebotys, Robert J. Gebotys, 1996, Proceedings of HICSS-29: 29th Hawaii International Conference on System Sciences.

Optimized mapping of video applications to hardware-software for VLSI architectures

Catherine H. Gebotys, Robert J. Gebotys, C. Gebotys, 1995, Proceedings of the Twenty-Eighth Annual Hawaii International Conference on System Sciences.

Counteracting power analysis attack using Static Single-ended Logic

Catherine H. Gebotys, Shahab Ardalan, Amir Khatib Zadeh, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

DSP address optimization using a minimum cost circulation technique

Catherine H. Gebotys, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Behavioral and Structural Interfaces

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008

Catherine H. Gebotys, Grant Martin, 2008, CODES+ISSS.

Setting Speed Records with the (Fractional) Multibase Non-Adjacent Form Method for Efficient Elliptic Curve Scalar Multiplication

Patrick Longa, Catherine H. Gebotys, 2008, IACR Cryptol. ePrint Arch..

Synthesizing Optimal Application-Specific DSP Architectures

Catherine H. Gebotys, 1994 .

Optimal synthesis of high-performance architectures

Catherine H. Gebotys, Mohamed I. Elmasry, C. Gebotys, 1992 .

A framework for security on NoC technologies

Catherine H. Gebotys, Robert J. Gebotys, C. Gebotys, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Introduction to Integer Programming

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

Statistically based prediction of power dissipation for complex embedded DSP processors

Catherine H. Gebotys, Robert J. Gebotys, 1999, Microprocess. Microsystems.

Oasic: Area-Delay Constrained Architectural Synthesis

Catherine H. Gebotys, Mohamed I. Elmasry, 1992 .

A Quantitative Analysis of a Novel SEU-Resistant SHA-2 and HMAC Architecture for Space Missions Security

Catherine H. Gebotys, Marcio Juliato, C. Gebotys, 2013, IEEE Transactions on Aerospace and Electronic Systems.

VLSI design synthesis with testability

Mohamed I. Elmasry, Catherine H. Gebotys, C. Gebotys, 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

A countermeasure for EM attack of a wireless PDA

Catherine H. Gebotys, X. Chen, C. C. Tiu, 2005, International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume II.

Secure and safety-critical vs. insecure, non safety-critical embedded systems: do they require completely different design approaches?

Peter Marwedel, Catherine H. Gebotys, 2004, CODES+ISSS '04.

Optimal synthesis of multichip architectures

Catherine H. Gebotys, C. Gebotys, 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

Current dynamics-based macro-model for power simulation in a complex VLIW DSP processor

Catherine H. Gebotys, Radu Muresan, 2002 .

Efficient Techniques for High-Speed Elliptic Curve Cryptography

Patrick Longa, Catherine H. Gebotys, C. Gebotys, 2010, CHES.

EM Analysis of Rijndael and ECC on a Wireless Java-Based PDA

Catherine H. Gebotys, Simon Ho, C. C. Tiu, 2005, CHES.

Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis

Mohamed I. Elmasry, Catherine H. Gebotys, C. Gebotys, 1991, DAC '91.

Side Channel Analysis using giant magneto-resistive (GMR) sensors

Catherine H. Gebotys, Edgar Mateos, 2011 .

Complexities in DSP software compilation: performance, code size, power, retargetability

Catherine H. Gebotys, Robert J. Gebotys, 1998, Proceedings of the Thirty-First Hawaii International Conference on System Sciences.

Elliptic Curve Protocols

Catherine H. Gebotys, C. Gebotys, 2010 .