Herman Schmit

发表

The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers

Satnam Singh, Herman Schmit, Ray Andraka, 2000, FPGA '00.

A power aware system level interconnect design methodology for latency-insensitive systems

Herman Schmit, Vikas Chandra, A. Xu, 2004, ICCAD 2004.

SCALIP - a scalable IP solution for pipelined arrays with limited feedback

Herman Schmit, Matt Moe, 2001, Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558).

Implementation of near Shannon limit error-correcting codes using reconfigurable hardware

Herman Schmit, Benjamin A. Levine, R. Reed Taylor, 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

Memory optimization in single chip network switch fabrics

Herman Schmit, David Whelihan, 2002, DAC '02.

Layout techniques for FPGA switch blocks

Herman Schmit, Vikas Chandra, V. Chandra, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Session details: Applications II

Herman Schmit, 2004, FPGA '04.

Evaluating alternative implementations for LDPC decoder check node function

Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides, 2004, IEEE Computer Society Annual Symposium on VLSI.

Extra-dimensional Island-Style FPGAs

Herman Schmit, 2003, FPL.

An architectural exploration of via patterned gate arrays

Lawrence T. Pileggi, Herman Schmit, Chetan Patel, 2003, ISPD '03.

Creating a power-aware structured ASIC

Herman Schmit, R. Reed Taylor, 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).

Efficient application representation for HASTE: Hybrid Architectures with a Single, Transformable Executable

Herman Schmit, Benjamin A. Levine, 2003, 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003..

Exploring regular fabrics to optimize the performance-cost trade-off

Andrzej J. Strojwas, Lawrence T. Pileggi, Herman Schmit, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays

Herman Schmit, Steve Wilton, 2005 .

Vertical benchmarks for CAD

Andrew Ryan, Herman Schmit, Christopher Inacio, 1999, DAC '99.

Array mapping in behavioral synthesis

Herman Schmit, Donald E. Thomas, 1995 .

Floorplanning of pipelined array modules using sequence pairs

Herman Schmit, Matthew Moe, H. Schmit, 2003, ISPD '03.

Address generation for memories containing multiple arrays

Herman Schmit, Donald E. Thomas, 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Tunable Fault Tolerance via Test and Reconfiguration

Seth Copen Goldstein, Herman Schmit, Shawn Blanton, 1998 .

A Model and Methodology for Hardware-Software Codesign

Herman Schmit, Donald E. Thomas, Jay K. Adams, 1993, IEEE Des. Test Comput..

Synthesis of Morphable Multipliers

Michael A. Schuette, Herman Schmit, Silviu M. S. A. Chiricescu, 2002, International Workshop on Logic & Synthesis.

A power aware system level interconnect design methodology for latency-insensitive systems

Lawrence T. Pileggi, Herman Schmit, Vikas Chandra, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

Session details: Technical Session 1: Computer-aided Design

Herman Schmit, 2015, FPGA 2015.

A low power approach to system level pipelined interconnect design

Herman Schmit, Vikas Chandra, Anthony Xu, 2004, SLIP '04.

SoC design skills: collaboration builds a stronger SoC design team

Narayanan Vijaykrishnan, Mary Jane Irwin, Steven P. Levitan, 2001, Proceedings 2001 International Conference on Microelectronic Systems Education.

Panel: Attack of the killer gate arrays

Herman Schmit, Jonathan Rose, Steve Trimberger, 2003, FPGA '03.

FPGA switch block layout and evaluation

Herman Schmit, Vikas Chandra, V. Chandra, 2002, FPGA '02.

Address generation for memories containing multiple arrays

Herman Schmit, Donald E. Thomas, 1995, ICCAD.

Regular logic fabrics for a via patterned gate array (VPGA)

Herman Schmit, Vyacheslav Rovner, Larry Pileggi, 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..

PipeRench: a co/processor for streaming multimedia acceleration

Seth Copen Goldstein, Mihai Budiu, Srihari Cadambi, 1999, ISCA.

Is reconfigurable computing commercially viable (panel)?

Herman Schmit, 1997, FPGA '97.

Enabling energy eff iciency in via-patterned gate array devices

Herman Schmit, R. Reed Taylor, 2004, Proceedings. 41st Design Automation Conference, 2004..

Placement challenges for structured ASICs

Herman Schmit, Amit Gupta, Radu Ciobanu, 2008, ISPD '08.

Hidden Markov modeling and fuzzy controllers in FPGAs

Herman Schmit, Donald E. Thomas, H. Schmit, 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

Pipeline Reconfigurable FPGAs

Seth Copen Goldstein, Srihari Cadambi, Herman Schmit, 2000, J. VLSI Signal Process..

Synthesis of application-specific memory structures

Herman Schmit, 1996 .

Queue machines: hardware compilation in hardware

Herman Schmit, Benjamin Ylvisaker, Benjamin A. Levine, 2002, Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005

Steven J. E. Wilton, Herman Schmit, 2005, FPGA.

Stratix™ 10 High Performance Routable Clock Networks

Carl Ebeling, Herman Schmit, David M. Lewis, 2016, FPGA.

Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited Paper

Herman Schmit, Randy Huang, H. Schmit, 2016, ISLPED.

Managing pipeline-reconfigurable FPGAs

Seth Copen Goldstein, Srihari Cadambi, Herman Schmit, 1998, FPGA '98.

Testing of Pipeline Reconfigurable Machines

Herman Schmit, Donald E. Thomas, Matthew Myers, 1998 .

Characterization and parameterization of a pipeline reconfigurable FPGA

Seth Copen Goldstein, Herman Schmit, Matthew Moe, 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

Scalable interconnect and power distribution for island-style FPGAs (poster abstract)

Herman Schmit, David Whelihan, Frank Gennari, 2000, FPGA '00.

PCI-PipeRench and the SWORDAPI: a system for stream-based reconfigurable computing

Herman Schmit, R. Reed Taylor, Ronald Laufer, 1999, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00375).

Behavioral synthesis for FPGA-based computing

Herman Schmit, Donald E. Thomas, L. Amstein, 1994, Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines.

PipeRench implementation of the instruction path coprocessor

John Paul Shen, Herman Schmit, Yuan C. Chou, 2000, MICRO 33.

PipeRench: A Reconfigurable Architecture and Compiler

Seth Copen Goldstein, Mihai Budiu, Srihari Cadambi, 2000, Computer.

Morphable Multipliers

Michael A. Schuette, Herman Schmit, Silviu M. S. A. Chiricescu, 2002, FPL.

Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays

Herman Schmit, Russ Tessier, 2004 .

A low-power 16-bit multiplier-accumulator using series-regulated mixed swing techniques

Herman Schmit, R. K. Krishnamurthy, L. R. Carley, 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics

Lawrence T. Pileggi, Herman Schmit, Aneesh Koorapaty, 2003, FPL.

Synthesis of application-specific memory designs

Herman Schmit, Donald E. Thomas, Donald E. Thomas, 1997, IEEE Trans. Very Large Scale Integr. Syst..

Array mapping in behavioral synthesis

Herman Schmit, Donald E. Thomas, H. Schmit, 1995, Proceedings of the Eighth International Symposium on System Synthesis.

Heterogeneous programmable logic block architectures

Lawrence T. Pileggi, Herman Schmit, Vikas Chandra, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Spatial Timing Analysis With Exact Propagation of Delay and Application to FPGA Performance

Herman Schmit, David Lewis, H. Schmit, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

CAD tool support for a multi-university SoC certificate program: The Digital Sandbox

Herman Schmit, Dave Landis, Thomas Kroll, 2003, Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03.

3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration

Ron Ho, Herman Schmit, George Chen, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir Computing

Herman Schmit, Matthew Denton, 2021 .

Mixed-swing quadrail for low power dual-rail domino logic

Herman Schmit, L. Richard Carley, Bharath Ramasubramanian, 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).

Incremental reconfiguration for pipelined applications

Herman Schmit, 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

An interconnect channel design methodology for high performance integrated circuits

Lawrence T. Pileggi, Herman Schmit, Vikas Chandra, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Asynchronous PipeRench: architecture and performance evaluations

Herman Schmit, Hiroto Kagotani, 2003, 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003..

Managing Pipeline-Recon gurable FPGAs

Seth Copen Goldstein, Srihari Cadambi, Herman Schmit, 1997 .