Sushanta Kumar Mohapatra

发表

Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET

S. K. Mohapatra, K. P. Pradhan, Sushanta Kumar Mohapatra, 2014, Microelectron. J..

Design Equivalent Scaling on Double Gate FinFET Towards Analog and RF Figures of Merits: A Technology Computer Aided Design Estimation

K. P. Pradhan, Sushanta Kumar Mohapatra, P. K. Sahu, 2015, J. Low Power Electron..

A SIMPLE ANALYTICAL CENTER POTENTIAL MODEL FOR CYLINDRICAL GATE ALL AROUND (CGAA) MOSFET

S. K. Mohapatra, Kumar Prasannajit Pradhan, Sushanta Kumar Mohapatra, 2014 .

Effect of channel & gate engineering on Double Gate (DG) MOSFET-A comparative study

Prasanna Kumar Sahu, Kumar Prasannajit Pradhan, Sushanta Kumar Mohapatra, 2012, 2012 International Conference on Emerging Electronics.

ZTC bias point of advanced fin based device: The importance and exploration

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2015 .

A Study of SCEs and Analog FOMs in GS-DG- MOSFET with Lateral Asymmetric Channel Doping

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2013 .

Optimization of Underlap Length for DGMOSFET and FinFET

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2015 .

Investigation on Performance Metrics of Nanoscale Multigate MOSFETs towards RF and IC Applications

Sushanta Kumar Mohapatra, 2015 .

Analytical modeling of threshold voltage for Cylindrical Gate All Around (CGAA) MOSFET using center potential

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2015 .

EXPLORATION TOWARDS ELECTROSTATIC INTEGRITY FOR SIGE ON INSULATOR (SG-OI) ON JUNCTIONLESS CHANNEL TRANSISTOR (JLCT)

S. K. Mohapatra, Sushanta Kumar Mohapatra, B. Shivalal Patro, 2017 .

Assessment of III-V FinFETs at 20nm Node: A Process Variation Analysis

Prasanna Kumar Sahu, Kumar Prasannajit Pradhan, Sushanta Kumar Mohapatra, 2015 .

Efficient wireless power transfer system for biomedical applications

S. K. Mohapatra, Satyaranjan Jena, Pradeep Kumar Sahu, 2021 .

A novel scheme for mitigation of energy hole problem in wireless sensor network for military application

S. K. Mohapatra, Sushanta Kumar Mohapatra, Trupti Mayee Behera, 2021, Int. J. Commun. Syst..

Estimation of analog/RF figures-of-merit using device design engineering in gate stack double gate MOSFET

Prasanna Kumar Sahu, S. K. Mohapatra, L. Artola, 2015 .

The performance measure of GS-DG MOSFET: an impact of metal gate work function

Prasanna Kumar Sahu, Kumar Prasannajit Pradhan, Sushanta Kumar Mohapatra, 2014 .

Symmetric DG-MOSFET With Gate and Channel Engineering: A 2-D Simulation Study

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2013 .

Temperature dependence inflection point in Ultra-Thin Si directly on Insulator (SDOI) MOSFETs: An influence to key performance metrics

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2015 .

Performance analysis of undoped cylindrical gate all around (GAA) MOSFET at subthreshold regime

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2015 .

Zero temperature-coefficient bias point over wide range of temperatures for single- and double-gate UTB-SOI n-MOSFETs with trapped charges

Prasanna Kumar Sahu, S. K. Mohapatra, Kumar Prasannajit Pradhan, 2015 .