Preetam Tadeparthy

Single amplifier bi-quadratic filter topologies in transimpedance configuration

Gaurav Chandra, Preetam Tadeparthy, Prakash Easwaran, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Techniques to improve linearity of CMOS sample-and-hold circuits for achieving 100 dB performance at 80 MSps

Preetam Tadeparthy, M. Das, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area

Preetam Tadeparthy, A. Seedher, K. A. S. Satheesh, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Single Amplifier Bi-Quadratic Filter Topologies in Transimpedance Configuration

Gaurav Chandra, Preetam Tadeparthy, Prakash Easwaran, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 115mW 12-bit 50 MSPS pipelined ADC

Preetam Tadeparthy, S. Ray, S. Mukherjee, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique]

Preetam Tadeparthy, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A CMOS bandgap reference with correction for device-to-device variation

Preetam Tadeparthy, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).