Jorge H. Meza Escobar

ISA configurability of an FPGA test-processor used for board-level interconnection testing

Heinz-Dietrich Wuttke, Jorge H. Meza Escobar, Jörg Sachße, 2013, 2013 14th Latin American Test Workshop - LATW.

A Configurable Test-Processor for Board-Level Testing

Heinz-Dietrich Wuttke, Jorge H. Meza Escobar, Steffen Ostendorff, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

Automatic generation of an FPGA based embedded test system for printed circuit board testing

Heinz-Dietrich Wuttke, Jorge H. Meza Escobar, Steffen Ostendorff, 2012, 2012 13th Latin American Test Workshop (LATW).

Modeling timing constraints for automatic generation of embedded test instruments

Heinz-Dietrich Wuttke, Jorge H. Meza Escobar, Steffen Ostendorff, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Architecture of an Adaptive Test System Built on FPGAs

Heinz-Dietrich Wuttke, Jorge H. Meza Escobar, Jörg Sachße, 2011, ARCS.

Adaptive Test System to Improve PCB Testing in the Automotive Industry

Heinz-Dietrich Wuttke, Jorge H. Meza Escobar, Steffen Ostendorff, 2013 .