T. Ueda
发表
Y. Miyazawa,
Yuji Matsuzaki,
T. Ueda,
1989
.
A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%
M. Yagyu,
Nobuo Tamba,
Toru Kobayashi,
2001
.
Jiri Limpouch,
T. Ueda,
Alexander A. Andreev,
2001,
SPIE Advanced Lithography.
T. Yamashita,
T. Ueda,
K. Takemura,
1997,
Proceedings of Conference on Intelligent Transportation Systems.
T. Ueda,
N. M. Hawkins,
N. Hawkins,
1986
.