Brucek Khailany

发表

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2019, Communications of the ACM.

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus

Tsung-Wei Huang, Haoxing Ren, Yanqing Zhang, 2022, ICPP.

Large Scale Mask Optimization Via Convolutional Fourier Neural Operator and Litho-Guided Self Training

Anima Anandkumar, K. Sastry, Zong-Yi Li, 2022, ArXiv.

S. Nath, Haoxing Ren, Brucek Khailany, 2022, Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design.

TransSizer: A Novel Transformer-Based Fast Gate Sizer

S. Nath, Haoxing Ren, Brucek Khailany, 2022, 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Generative self-supervised learning for gate sizing: invited

S. Nath, Haoxing Ren, Brucek Khailany, 2022, Proceedings of the 59th ACM/IEEE Design Automation Conference.

An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design

Anima Anandkumar, K. Sastry, Zong-Yi Li, 2022, ArXiv.

A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm

William J. Dally, Brucek Khailany, Stephen G. Tell, 2019, 2019 Symposium on VLSI Circuits.

Comparing Reyes and OpenGL on a stream architecture

William J. Dally, John D. Owens, Brian Towles, 2002, HWWS '02.

A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm

William J. Dally, Yanqing Zhang, Brucek Khailany, 2020, IEEE Journal of Solid-State Circuits.

Timeloop: A Systematic Approach to DNN Accelerator Evaluation

Brucek Khailany, Stephen W. Keckler, Joel S. Emer, 2019, 2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).

INVITED: A Modular Digital VLSI Flow for High-Productivity SoC Design

Christopher Torng, Shreesha Srinath, Brucek Khailany, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

SCNN: An accelerator for compressed-sparse convolutional neural networks

William J. Dally, Antonio Puglielli, Brucek Khailany, 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).

Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture

William J. Dally, Yanqing Zhang, Brucek Khailany, 2019, MICRO.

Hardware-Enabled Artificial Intelligence

William J. Dally, John Poulton, Brucek Khailany, 2018, 2018 IEEE Symposium on VLSI Circuits.

GPUs and the Future of Parallel Computing

William J. Dally, Michael Garland, David Glasco, 2011, IEEE Micro.

Simba

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2021, Commun. ACM.

3.2 The A100 Datacenter GPU and Ampere Architecture

Brucek Khailany, Ronny Krashinsky, Vishnu Balan, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Generic lithography modeling with dual-band optics-inspired neural networks

Anima Anandkumar, K. Sastry, M. Kilgard, 2022, DAC.

High Performance Graph ConvolutionaI Networks with Applications in Testability Analysis

Brucek Khailany, Yuzhe Ma, Bei Yu, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Evaluating the Imagine stream architecture

William J. Dally, Jung Ho Ahn, Abhishek Das, 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

Stream Processors: Progammability and Efficiency

William J. Dally, Jung Ho Ahn, Abhishek Das, 2004, ACM Queue.

The Imagine Stream Processor

William J. Dally, John D. Owens, Brucek Khailany, 2002, Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors.

William J. Dally, John D. Owens, Brucek Khailany, 2000, Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550).

A bandwidth-efficient architecture for media processing

William J. Dally, John D. Owens, Brucek Khailany, 1998, Proceedings. 31st Annual ACM/IEEE International Symposium on Microarchitecture.

HEAT: Hardware-Efficient Automatic Tensor Decomposition for Transformer Compression

Anima Anandkumar, Jean Kossaifi, Ben Keller, 2022, ArXiv.

Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers

Anand Raghunathan, Brucek Khailany, Jacob R. Stevens, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

Accelerating Chip Design With Machine Learning

William J. Dally, Yanqing Zhang, Brucek Khailany, 2020, IEEE Micro.

Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization

David Z. Pan, Brucek Khailany, Haoxing Ren, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

GRANNITE: Graph Neural Network Inference for Transferable Power Estimation

Brucek Khailany, Haoxing Ren, Yanqing Zhang, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).

PRIMAL: Power Inference using Machine Learning

Yuan Zhou, Zhiru Zhang, Brucek Khailany, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

Jiaqi Gu, David Z. Pan, Brucek Khailany, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training

W. Dally, Rangharajan Venkatesan, B. Zimmer, 2022, ICML.

A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2023, IEEE Journal of Solid-State Circuits.

LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update

Anima Anandkumar, B. Dally, Rangharajan Venkatesan, 2021, IEEE Transactions on Computers.

VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference pdf

William J. Dally, Brucek Khailany, Brian Zimmer, 2021, MLSys.

Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor

William J. Dally, Brucek Khailany, Stephen W. Keckler, 2012, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture.

MAGNet: A Modular Accelerator Generator for Neural Networks

William J. Dally, Brucek Khailany, Jason Clemons, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

CudaDMA: Optimizing GPU memory bandwidth via warp specialization

Brucek Khailany, Michael Bauer, Henry Cook, 2011, 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC).

Imagine: Media Processing with Streams

William J. Dally, John D. Owens, Brian Towles, 2001, IEEE Micro.

PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network

Yiran Chen, Jiang Hu, Brucek Khailany, 2020, 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC).

A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET

William J. Dally, Brucek Khailany, Stephen G. Tell, 2019, 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC).

A Pausible Bisynchronous FIFO for GALS Systems

Brucek Khailany, Matthew Fojtik, Ben Keller, 2015, 2015 21st IEEE International Symposium on Asynchronous Circuits and Systems.

The VLSI implementation and evaluation of area-and energy-efficient streaming media processors

William J. Dally, Brucek Khailany, W. Dally, 2003 .

FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning

Yiran Chen, Yanqing Zhang, Jiang Hu, 2020, 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC).

ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs

David Z. Pan, Brucek Khailany, Yibo Lin, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

DREAMPIace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

David Z. Pan, Brucek Khailany, Yibo Lin, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Exploring the VLSI scalability of stream processors

William J. Dally, John D. Owens, Brian Towles, 2003, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings..

Analog/Mixed-Signal Hardware Error Modeling for Deep Learning Inference

William J. Dally, Brucek Khailany, Nikola Nedovic, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Report for the NSF Workshop on Cross ‐ layer Power Optimization and Management

Jon C. Hiller, C. J. Holland, Benjamin C. Lee, 2012 .

Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk)

Yanqing Zhang, Brucek Khailany, Haoxing Ren, 2020, 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

AutoDMP: Automated DREAMPlace-based Macro Placement

Ben Keller, Anthony Agnesina, Haoxing Ren, 2023, ISPD.

SCNN

W. Dally, A. Parashar, Minsoo Rhu, 2017 .

AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies

C. T. Gray, Walker J. Turner, B. Zimmer, 2022, ISPD.

A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology

William J. Dally, Yanqing Zhang, Brucek Khailany, 2019, 2019 IEEE Hot Chips 31 Symposium (HCS).

Accelerating Chip Design with Machine Learning

Brucek Khailany, Brucek Khailany, 2020, 2020 ACM/IEEE 2nd Workshop on Machine Learning for CAD (MLCAD).

IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs

Brucek Khailany, Rangharajan Venkatesan, Ben Keller, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Efficient conditional operations for data-parallel architectures

W. Dally, S. Rixner, B. Khailany, 2000, Proceedings 33rd Annual IEEE/ACM International Symposium on Microarchitecture. MICRO-33 2000.

AutoDMP: Automated DREAMPlace-based Macro Placement

Ben Keller, Anthony Agnesina, Haoxing Ren, 2023, ISPD.

An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling

Brucek Khailany, Mingjie Liu, Haoxing Ren, 2023, 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD).

Machine Learning and Algorithms: Let Us Team Up for EDA

Matthew R. Fojtik, Haoxing Ren, Yanqing Zhang, 2023, IEEE Design & Test.

ChipNeMo: Domain-Adapted LLMs for Chip Design

S. Oberman, B. Dally, Jonathan Raiman, 2023, ArXiv.

Efficient Transformer Inference with Statically Structured Sparse Attention

Rangharajan Venkatesan, Brucek Khailany, Steve Dai, 2023, 2023 60th ACM/IEEE Design Automation Conference (DAC).

Low-Precision Training in Logarithmic Number System using Multiplicative Weight Update

Anima Anandkumar, B. Dally, Rangharajan Venkatesan, 2021, ArXiv.