Ramesh Bhakthavatchalu

发表

Deterministic seed selection and pattern reduction in Logic BIST

Ramesh Bhakthavatchalu, Sreeja Krishnan, V. Vineeth, 2014, 18th International Symposium on VLSI Design and Test.

Design of efficient programmable test-per-scan logic BIST modules

Ramesh Bhakthavatchalu, K. N. Devika, 2017, 2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS).

Comparison of reconfigurable FFT processor implementation using CORDIC and multipliers

Ramesh Bhakthavatchalu, Nisha Abdul Kareem, J Arya, 2011, 2011 IEEE Recent Advances in Intelligent Computational Systems.

Reconfigurable Logic Built in Self-Test technique for SoC Applications

Ramesh Bhakthavatchalu, Sreeja Krishnan, M Nirmala Devi, 2014 .

Design and implementation of Izhikevich spiking neuron model on FPGA

Ramesh Bhakthavatchalu, Shanmukha Murali, Juneeth Kumar, 2016, 2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT).

FPGA based delay PUF implementation for security applications

Ramesh Bhakthavatchalu, Mahin Anil Kumar, 2017, 2017 International Conference on Technological Advancements in Power and Energy ( TAP Energy).

Design and analysis of low power open core protocol compliant interface using VHDL

Ramesh Bhakthavatchalu, G R Deepthy, S Vidhya, 2011, 2011 International Conference on Emerging Trends in Electrical and Computer Technology.

Design of interactive paging and locating device for GPS applications

Ramesh Bhakthavatchalu, Anjana Muraleedharan, 2017, 2017 International Conference on Communication and Signal Processing (ICCSP).

An FPGA based low cost receiver for ultrasonic anemometer

P. Pradeep Kumar, Ramesh Bhakthavatchalu, Reshma Chandran, 2016, 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT).

Reseeding LFSR for Test Pattern Generation

Ramesh Bhakthavatchalu, Geethu Remadevi Somanathan, Patare Snehal Dilip, 2019, 2019 International Conference on Communication and Signal Processing (ICCSP).

Storage memory/NVM based executable memory interface IP for advanced IoT applications

Ramesh Bhakthavatchalu, Midhun K. Dinesh, 2016, 2016 International Conference on Recent Trends in Information Technology (ICRTIT).

32-bit reconfigurable logic-BIST design using Verilog for ASIC chips

Ramesh Bhakthavatchalu, B. Sruthi, G R Deepthy, 2011, 2011 IEEE Recent Advances in Intelligent Computational Systems.

Reconfigurable autonomous mini robot design using CPLD's

Ramesh Bhakthavatchalu, K. Aditya, P. Dinesh, 2010 .

Verilog Design of Programmable JTAG Controller for Digital VLSI IC’s

Ramesh Bhakthavatchalu, M. Nirmala Devi, Saranya K. Kannan, 2015 .

A Mobile Phone Controlled Remote Robot

Ramesh Bhakthavatchalu, Arun Krishnan, R. Harikrishnan, 2011 .

Design of reconfigurable LFSR for VLSI IC testing in ASIC and FPGA

Ramesh Bhakthavatchalu, K. N. Devika, K. Devika, 2017, 2017 International Conference on Communication and Signal Processing (ICCSP).

Implementation of hybrid cryptosystem using DES and MD5

Ramesh Bhakthavatchalu, Sreehari K N, 2018, 2018 3rd International Conference on Communication and Electronics Systems (ICCES).

Systolic Array Implementation of Mix Column and Inverse Mix Column of AES

Ramesh Bhakthavatchalu, Sreehari K N, Midhun Sasikumar, 2019, 2019 International Conference on Communication and Signal Processing (ICCSP).

Fault tolerant FSM on FPGA using SEC-DED code algorithm

Ramesh Bhakthavatchalu, M Manasy, S Sooraj, 2017, 2017 International Conference on Technological Advancements in Power and Energy ( TAP Energy).

Design and Implementation of Improved Attenuation CIC Decimator and Interpolator in FPGA

Ramesh Bhakthavatchalu, Lekshmi Ramesh, V. S. Karthika, 2011 .

Comparative Study of Test Pattern Generation Systems to Reduce Test Application Time

Ramesh Bhakthavatchalu, Geethu Remadevi Somanathan, Patare Snehal Dilip, 2019, 2019 9th International Symposium on Embedded Computing and System Design (ISED).

Low power scheduled alarm system using embedded microcontroller with USB interface

Ramesh Bhakthavatchalu, S Sreenivasa Mallia, R HariKrishnan, 2011, 2011 International Conference on Emerging Trends in Electrical and Computer Technology.

Gray code for test pattern generation

Ramesh Bhakthavatchalu, Geethu Remadevi Somanathan, Patare Snehal Dilip, 2020 .

Analysis of low power open core protocol bridge interface using VHDL

Ramesh Bhakthavatchalu, G R Deepthy, S Vidhya, 2011, 2011 IEEE Recent Advances in Intelligent Computational Systems.

A recon_gurable logic BIST architecture for secure testing of VLSI circuits

Ramesh Bhakthavatchalu, 2016 .

Analysis of Fixed Width and Flexible Width TBA and TRA Test Architectures for Soc Design

Ramesh Bhakthavatchalu, Brijesh Rk Bhadran, M Arjun Hari, 2011 .

UVM based testbench architecture for logic sub-system verification

Ramesh Bhakthavatchalu, T M Pavithran, 2017, 2017 International Conference on Technological Advancements in Power and Energy ( TAP Energy).

Design and implementation of Hodgkin and Huxley spiking neuron model on FPGA

Ramesh Bhakthavatchalu, Murali, Juneeth Kumar, 2016, 2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT).

Time of flight measurement system for an ultrasonic anemometer

P. Pradeep Kumar, Ramesh Bhakthavatchalu, Pooja Chandran, 2016, 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT).

Implementation of Reduced Power Open Core Protocol Compliant Memory System using VHDL

Ramesh Bhakthavatchalu, R DeepthyG, 2011 .

Hamming 3 algorithm for improving the reliability of SRAM based FPGAs

Ramesh Bhakthavatchalu, S. Sooraj, 2017, 2017 International Conference on Communication and Signal Processing (ICCSP).

Block Level SoC Verification Using Systemverilog

Ramesh Bhakthavatchalu, Krishnan K Yadu, 2019, 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA).

Analysis of Low Power Open Core Protocol Complaint Memory Interface Using VHDL

Ramesh Bhakthavatchalu, 2011 .

Programmable MISR modules for logic BIST based VLSI testing

Ramesh Bhakthavatchalu, K N Devika, 2016, 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT).

Design and implementation of Izhikevich, Hodgkin and Huxley spiking neuron models and their comparison

Ramesh Bhakthavatchalu, Shanmukha Murali, Juneeth Kumar, 2016, 2016 International Conference on Advanced Communication Control and Computing Technologies (ICACCCT).

Synthesis of Synchronous Gray Code Counters by Combining Mentor Graphics HDL Designer and Xilinx VIVADO FPGA Flow

Ramesh Bhakthavatchalu, Geethu Remadevi Somanathan, Siva Satya Sri Ganesh Seeram, 2020, 2020 International Conference on Communication and Signal Processing (ICCSP).

Implementing delay based physically unclonable functions on FPGA

Ramesh Bhakthavatchalu, N H N Sai Kiran, 2016, 2016 International Conference on Advanced Communication Control and Computing Technologies (ICACCCT).

Programmable N-Point FFT Design

Ramesh Bhakthavatchalu, R Anju, Meera Viswanath, 2014 .

Parameterizable FPGA Implementation of SHA-256 using Blockchain Concept

Ramesh Bhakthavatchalu, Devika K N, 2019, 2019 International Conference on Communication and Signal Processing (ICCSP).

Low power design techniques applied to pipelined parallel and iterative CORDIC design

Ramesh Bhakthavatchalu, Parvathi Nair, 2011, 2011 3rd International Conference on Electronics Computer Technology.

Low Latency Max Log MAP based Turbo Decoder

Ramesh Bhakthavatchalu, Senthil Murugan, Aswathy Narayanan, 2019, 2019 International Conference on Communication and Signal Processing (ICCSP).

A Design and implementation of an intelligent performance optimized low power scheduled alarm system using Embedded Microcontroller

Ramesh Bhakthavatchalu, Arun Krishnan, R. Harikrishnan, 2011 .

Modified Blockchain based Hardware Paradigm for Data Provenance in Academia

Ramesh Bhakthavatchalu, Devika K N, 2021 .

Efficient hardware prototype of ECDSA modules for blockchain applications

Ramesh Bhakthavatchalu, Devika K N, 2021, TELKOMNIKA (Telecommunication Computing Electronics and Control).

Scalable and Rapid Fault Detection of Memories Using MBIST and Signature Analysis

Ramesh Bhakthavatchalu, Midhun Sasikumar, K. N. Sreehari, 2021 .

Crypto Keys Based Secure Access Control for JTAG and Logic BIST Architecture

Ramesh Bhakthavatchalu, Nirmala Devi, 2015 .