S. S. Chung

A high level simulator feasible for reliability analysis of VLSI circuits

S. S. Chung, Tian-Sheuan Chang, P.-C. Hsu, 1991, [1991] Proceedings Fourth Annual IEEE International ASIC Conference and Exhibit.

The control of a model factory: a MAP workplace

S. S. Chung, A. O. Bishop, 1989, Proceedings. IEEE Energy and Information Technologies in the Southeast'.

An accurate two-dimensional intrinsic capacitance model of short channel MOSFETs

S. S. Chung, 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

Effect of Fuel Injector-type Spark Plug on Combustion Characteristics

S. S. Chung, J. K. Yeom, 2009 .

The understanding of multi-level RTN in trigate MOSFETs through the 2D profiling of traps and its impact on SRAM performance: A new failure mechanism found

E. R. Hsieh, S. S. Chung, C. H. Tsai, 2012, 2012 International Electron Devices Meeting.

3-D interconnect capacitance calculation for multi-conductor and its application to a ROM circuit design

S. S. Chung, G.-D. Huang, 1992, [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit.

A novel approach for the two-dimensional simulation of submicron MOSFETs using monotone iterative method

S. S. Chung, Yiming Li, Jinn-Liang Liu, 1999, 1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453).

Spreading Diversity in Multi-cell Neutron-Induced Upsets with Device Scaling

S. S. Chung, Eishi Ibe, ShiJie Wen, 2006, IEEE Custom Integrated Circuits Conference 2006.

An improved I-V model of small geometry MOSFETs for SPICE

S. S. Chung, T. S. Lin, Yi-Ting Chen, 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

The physical insights into an abnormal erratic behavior in the resistance random access memory

S. S. Chung, P. Y. Gu, H. Y. Lee, 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

A Consistent Drain And Substrate Current Model Of LDD MOS Devices For Circuit Simulation

S. S. Chung, C.-S. Chen, Jin-Jia Yang, 1993, [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD).

Experimental observation on the random dopant fluctuation of small scale trigate CMOS devices

S. S. Chung, S. Chung, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

The understanding of the trap induced variation in bulk tri-gate devices by a novel random trap profiling (RTP) technique

E. R. Hsieh, S. S. Chung, C. Tsai, 2012, 2012 Symposium on VLSI Technology (VLSIT).