Jen-Chou Tseng

发表

ESD protection structure with inductor-triggered SCR for RF applications in 65-nm CMOS process

Ming-Hsien Tsai, Chun-Yu Lin, Li-Wei Chu, 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).

Design of ESD protection cell for dual-band RF applications in a 65-nm CMOS process

Ming-Hsien Tsai, Chun-Yu Lin, Li-Wei Chu, 2012, Electrical Overstress / Electrostatic Discharge Symposium Proceedings 2012.

A SCR-buried BJT device for robust ESD protection with high latchup immunity in high-voltage technology

Jen-Chou Tseng, Chih-Yao Huang, Fu-Chien Chiu, 2009, 2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.

An efficient full-chip ESD paths resistance value verification flow for large scale designs

Ming-Hsiang Song, Jen-Chou Tseng, Yi-Kan Cheng, 2013, 2013 35th Electrical Overstress/Electrostatic Discharge Symposium.

ESD protection design for radio-frequency integrated circuits in nanoscale CMOS technology

Ming-Hsien Tsai, Chun-Yu Lin, Li-Wei Chu, 2013, 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013).

60 GHz low noise amplifiers with 1 kV CDM protection in 40 nm LP CMOS

P. Wambacq, Ming-Hsiang Song, Jen-Chou Tseng, 2012, 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

Latchup test-induced failure within ESD protection diodes in a high-voltage CMOS IC product

Ming-Dou Ker, Jen-Chou Tseng, Chia-Ku Tsai, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

An ultra-low power K-band low-noise amplifier co-designed with ESD protection in 40-nm CMOS

Ming-Hsien Tsai, Ming-Hsiang Song, Chewn-Pu Jou, 2011, 2011 IEEE International Conference on IC Design & Technology.

A high latchup - Immune ESD protection SCR-incorporated BJT in deep submicron technology

Jen-Chou Tseng, Chih-Yao Huang, Fu-Chien Chiu, 2013, Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

CDM protection for millimeter-wave circuits

Dimitri Linten, Ming-Hsiang Song, Jen-Chou Tseng, 2011, EOS/ESD Symposium Proceedings.

Investigation and solution to the early failure of parasitic NPN triggered by the adjacent PNP ESD clamps

Ming-Hsiang Song, Jen-Chou Tseng, Ming-Fu Tsai, 2015, 2015 37th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

An on-chip combo clamp for surge and universal ESD protection in bulk FinFET technology

Ming-Hsiang Song, Jen-Chou Tseng, Tzu-Heng Chang, 2016, 2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

High CDM resistant low-cap SCR for 0.9V advanced CMOS technology

Li-Wei Chu, Ming-Hsiang Song, Jen-Chou Tseng, 2013, 2013 35th Electrical Overstress/Electrostatic Discharge Symposium.

An analog front-end circuit with dual-directional SCR ESD protection for UHF-band passive RFID tag

Ming-Hsien Tsai, Ming-Hsiang Song, Chewn-Pu Jou, 2011, 2011 IEEE International Conference on RFID.

ESD protection design for low trigger voltage and high latch-up immunity

Ming-Dou Ker, Jen-Chou Tseng, Chia-Ku Tsai, 2010, 2010 17th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.

A 6.5kV ESD-protected low noise amplifier in 65-nm CMOS

Ming-Hsiang Song, Chewn-Pu Jou, Jen-Chou Tseng, 2010, 2010 IEEE MTT-S International Microwave Symposium.

Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

Ming-Dou Ker, Jen-Chou Tseng, Chih-Yao Huang, 2002, Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614).

Improving ESD robustness of stacked diodes with embedded SCR for RF applications in 65-nm CMOS

Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, 2014, 2014 IEEE International Reliability Physics Symposium.

An SCR-Incorporated BJT Device for Robust ESD Protection With High Latchup Immunity in High-Voltage Technology

Jen-Chou Tseng, Chih-Yao Huang, Fu-Chien Chiu, 2012, IEEE Transactions on Device and Materials Reliability.

Effects of electrostatic discharge high-field current impulse on oxide breakdown

Jen-Chou Tseng, Jenn-Gwo Hwu, J. Hwu, 2007 .

Characterization of the electrostatic discharge induced interface traps in metal-oxide-semiconductor field-effect transistors

Jen-Chou Tseng, Jenn-Gwo Hwu, 2009, 2009 IEEE International Reliability Physics Symposium.