Christoph Baumhof

A BCH decoding architecture with mixed parallelization degrees for flash controller applications

Christoph Baumhof, Axel Mehnert, Jens Spinner, 2013, 2013 IEEE International SOC Conference.

A CMOS Floating-Point Processing Chip for Verified Exact Vector Arithmetic

Christoph Baumhof, Peter Schramm, Thomas Teufel, 1994, ESSCIRC '94: Twientieth European Solid-State Circuits Conference.

A method for restoring administrative data records of a block-erasable memory

Christoph Baumhof, Reinhard Kuehne, 2003 .

A digitally programmable on-chip RC-oscillator in 0.25 /spl mu/m CMOS logic process

Christoph Baumhof, Chiara Ghidini, Danilo Gerna, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Ein Vektorarithmetik-Koprozessor in VLSI-Technik zur Unterstützung des Wissenschaftlichen Rechnens

Christoph Baumhof, 1996 .

A new VLSI vector arithmetic coprocessor for the PC

Christoph Baumhof, 1995, Proceedings of the 12th Symposium on Computer Arithmetic.

A VLSI vector arithmetic coprocessor for the PCs

Christoph Baumhof, Gerd Bohlender, 1996, RITA.

A novel 32 bit RISC architecture unifying RISC and DSP

Christoph Baumhof, Frank Müller, Otto Müller, 1997, 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing.

Memory system having multiple memory controllers and methods for synchronization

Christoph Baumhof, Reinhard Kühne, 2002 .

A method for data update for an increase in the reliability of flash memories

Christoph Baumhof, Franz Schmidberger, Axel Mehnert, 2014 .