Shoji Wada

A Synchronous DRAM with New High-Speed I/O Lines Method for the MultiMedia Age

Kanji Oishi, Masahiro Katayama, Yuji Sakai, 1995 .

Design and Application of Innovative Multi-table and Bond Head Drive System on Thermal Compression Bonder with UPH Over 2000

Shigetoshi Sugawa, Tomonori Nakamura, Shoji Wada, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

PLATINE DE LIAISON ET SON PROCÉDÉ DE FABRICATION

Shoji Wada, 庄司 和田, 2015 .

Improvements to or with respect to integrated circuits

Kazuya Ito, David R. Brown, Shoji Wada, 1997 .

High Speed Data Output Circuit Techniques for a 17 ns 4 Mbit BiCMOS DRAM

Masahiro Yoshida, Masayuki Nakamura, Toshio Maeda, 1992 .

A 17ns 4Mb BICMOS DRAM

Masahiro Yoshida, Masayuki Nakamura, Toshio Maeda, 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

WPM 3.6: A 17ns 4Mb BiCMOS DRAM

Masahiro Yoshida, Masayuki Nakamura, Jun Murata, 1990 .