Zhen Lin

High-performance feedforward neural network mapped by NoC architecture with a new routing strategy implementation method

Yiping Dong, Zhen Lin, Ce Li, 2011 .

Implementation and evaluation of deep neural networks (DNN) on mainstream heterogeneous systems

Zhen Lin, Feng Zhang, Maohua Zhu, 2014, APSys.

High performance and low latency mapping for neural network into network on chip architecture

Yiping Dong, Zhen Lin, Takahiro Watanabe, 2009, 2009 IEEE 8th International Conference on ASIC.

High dependable implementation of Neural Networks with networks on chip architecture and a backtracking routing algorithm

Yiping Dong, Zhen Lin, Takahiro Watanabe, 2009, 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia).

High performance Networks on Chip architecture with a new routing strategy for neural network

Yiping Dong, Zhen Lin, Takahiro Watanabe, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

High performance implementation of Neural Networks by networks on chip with 5-port 2-virtual channels

Yiping Dong, Zhen Lin, Takahiro Watanabe, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Multiple Network-on-Chip Model for High Performance Neural Network

Yiping Dong, Zhen Lin, Takahiro Watanabe, 2010 .