T. Reinikainen

Global/local modeling for PWB mechanical loading

Jiansen Zhu, S. Quander, T. Reinikainen, 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

Transition to Pb-free manufacturing using land grid array packaging technology

Wei Ren, T. Reinikainen, A. Kujala, 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).

Fatigue of Chip Scale Package Interconnects Due to Cyclic Bending

Abhijit Dasgupta, T. Reinikainen, V. Halkola, 2001 .

Reliability Study of Package Stacking Under Thermomechanical Conditions

Jiansen Zhu, T. Reinikainen, Kazuo Ishibahsi, 2005 .

Simulation-enhanced qualification of printed wiring board-level reliability in microelectronics

T. Reinikainen, 2009 .

A New Method to Determine Crack Shape and Size in Solder Joints

T. Ahrens, T. Reinikainen, W. Kolbe, 1995 .

Guidelines to select underfills for flip chip on board assemblies and compliant interposers for chip scale package assemblies

J.F.J.M. Caers, Abhijit Dasgupta, T. Reinikainen, 2000 .

Numerical studies of the mechanical response of solder joint to drop/impact load

Leon Xu, Bo Ping Wang, Zhen Xue Han, 2003, Proceedings of the 5th Electronics Packaging Technology Conference (EPTC 2003).

Absolute and relative fatigue life prediction methodology for virtual qualification and design enhancement of lead-free BGA

T. Reinikainen, Hun Shen Ng, E. Hussa, 2005, Proceedings Electronic Components and Technology, 2005. ECTC '05..

Modeling stresses in ultra-thin flip chips

P. Marjamaki, Jorma Kivilahti, T. Reinikainen, 2000, 4th International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing. Proceedings. Presented at Adhesives in Electronics 2000 (Cat. No.00EX431).