J. A. Ott

High-mobility high-Ge-content Si1−xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width

E. Leobandung, P. Hashemi, Takashi Ando, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

Scaling of SOI FinFETs down to fin width of 4 nm for the 10nm technology node

J. A. Ott, A. Pyzyna, C.-H. Lin, 2011, 2011 Symposium on VLSI Technology - Digest of Technical Papers.

High performance and record subthreshold swing demonstration in scaled RMG SiGe FinFETs with high-Ge-content channels formed by 3D condensation and a novel gate stack process

T. Ando, V. Narayanan, E. Leobandung, 2017, 2017 Symposium on VLSI Technology.

Kerf-Less Removal of Si, Ge, and III–V Layers by Controlled Spalling to Enable Low-Cost PV Technologies

J. A. Ott, B. Hekmatshoar, D. Shahrjerdi, 2011, IEEE Journal of Photovoltaics.

High-performance Si1−xGex channel on insulator trigate PFETs featuring an implant-free process and aggressively-scaled fin and gate dimensions

R. H. Dennard, E. Leobandung, P. Hashemi, 2013, 2013 Symposium on VLSI Technology.

Coulomb blockade in a silicon/silicon-germanium two-dimensional electron gas quantum dot

D. E. Savage, M. G. Lagally, S. N. Coppersmith, 2004, cond-mat/0404399.

Replacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT ∼7Å and scaled dimensions down to sub-4nm fin widths

T. Ando, V. Narayanan, E. Leobandung, 2016, 2016 IEEE Symposium on VLSI Technology.

Si nanowire CMOS fabricated with minimal deviation from RMG FinFET technology showing record performance

N. Loubet, T. Yamashita, J. A. Ott, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).