V. Koldyaev

Design of band-gap engineered silicon-germanium Junctionless Double-gate FET for ZRAM application

A. Chatterjee, G. Trivedi, D. K. Sinha, 2015, 2015 6th International Conference on Computers and Devices for Communication (CODEC).

A leakage current model for SOI based floating body memory that includes the Poole-Frenkel effect

S. Okhonin, M. Nagoga, A. Nayfeh, 2008, 2008 IEEE International SOI Conference.

A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET

Gaurav Trivedi, Dheeraj Kumar Sinha, Amitabh Chatterjee, 2016, 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID).

Electric-field and temperature dependence of the activation energy associated with gate induced drain leakage

A. Alnuaimi, A. Nayfeh, V. Koldyaev, 2013 .