F. Barat

Methodology for building processor design space exploration

Rudy Lauwereins, Henk Corporaal, Geert Deconinck, 2007 .

Methodology for building processor design space exploration frameworks

Rudy Lauwereins, Henk Corporaal, Geert Deconinck, 2005 .

Clustered loop buffer organization for low energy VLIW embedded processors

Henk Corporaal, Francky Catthoor, Francisco Barat, 2005, IEEE Transactions on Computers.

Instruction buffering exploration for low energy VLIWs with instruction clusters

Rudy Lauwereins, Henk Corporaal, Francky Catthoor, 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

CRISP: A Template for Reconfigurable Instruction Set Processors

Rudy Lauwereins, Francisco Barat, Murali Jayapala, 2001, FPL.

Bridging the educational gap in embedded systems curricula: developing an e-commerce audio streaming system

Francisco Barat, Geert Deconinck, Vincenzo De Florio, 2002, Proceedings Ninth Annual IEEE International Conference and Workshop on the Engineering of Computer-Based Systems.

An Ultra Low Energy Biomedical Signal Processing System Operating at Near-Threshold

Mario Konijnenburg, Francisco Barat, Johan David, 2011, IEEE Transactions on Biomedical Circuits and Systems.

Reconfigurable Instruction Set Processors from a Hardware/Software Perspective

Rudy Lauwereins, Francisco Barat, Geert Deconinck, 2002, IEEE Trans. Software Eng..

Reconfigurable instruction set processors: a survey

Rudy Lauwereins, Francisco Barat, R. Lauwereins, 2000, Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668).

Instruction buffering exploration for low energy embedded processors

Rudy Lauwereins, Henk Corporaal, Francky Catthoor, 2005, J. Embed. Comput..

Instruction and Data Memory Energy Trade-off using a High-level Model (Abstract)

Henk Corporaal, Tom Vander Aa, Murali Jayapala, 2004 .