S. Yazdanshenas

High density, low energy, magnetic tunnel junction based block RAMs for memory-rich FPGAs

Vaughn Betz, Sadegh Yazdanshenas, Kosuke Tatsumura, 2016, 2016 International Conference on Field-Programmable Technology (FPT).

FPGA Logic Block Architectures for Efficient Deep Learning Inference

Vaughn Betz, Sadegh Yazdanshenas, Mohamed Eldafrawy, 2020, ACM Trans. Reconfigurable Technol. Syst..

You Cannot Improve What You Do not Measure

Vaughn Betz, Sadegh Yazdanshenas, Andrew Boutros, 2018, ACM Trans. Reconfigurable Technol. Syst..

Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs

Vaughn Betz, Sadegh Yazdanshenas, Andrew Boutros, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

The Costs of Confidentiality in Virtualized FPGAs

Vaughn Betz, Sadegh Yazdanshenas, V. Betz, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Don't Forget the Memory: Automatic Block RAM Modelling, Optimization, and Architecture Exploration

Vaughn Betz, Sadegh Yazdanshenas, Kosuke Tatsumura, 2017, FPGA.

Interconnect Solutions for Virtualized Field-Programmable Gate Arrays

Vaughn Betz, Sadegh Yazdanshenas, V. Betz, 2018, IEEE Access.