N. Venkateswaran

发表

A Frequency Adaptive Packet Wavelet Coder for Still Images Using CNN

J. Vignesh, S. Santhosh Kumar, N. Venkateswaran, 2006, ICHIT.

Analysis of bit transition count for EDAC encoded FSM

T. L. Rajaprabhu, V. Balaji, Venkataraman Mahalingam, 2003, 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003..

Selective Plane Replacement Watermarking and Cryptography (SPRWC)

N. Venkateswaran, K . Anusudha, J. Valaramathi, 2016 .

A Design Methodology for Very Large Array Processors - Part 1: Gipop Processor Array

Ashraf Ahmed, R. Devanathan, N. Venkateswaran, 1995, Int. J. Pattern Recognit. Artif. Intell..

Frequency domain testing of general purpose processors at the instruction execution level

Krishna Bharath, N. Venkateswaran, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

Comparison of Pyramidal and Packet Wavelet Coder for Image Compression Using Cellular Neural Network (CNN) with Thresholding and Quantization

J. Vignesh, S. Santhosh Kumar, N. Venkateswaran, 2007, Fourth International Conference on Information Technology (ITNG'07).

Kinect-Based Outdoor Navigation for the Visually Challenged Using Deep Learning

Anand Subramanian, W. Jino Hans, N. Venkateswaran, 2021 .

Illumination Invariant Feature Extraction for Multispectral Palmprint Verification

S Saranraj, N. Venkateswaran, S Sudharsan, 2016 .

An Example-based Super-Resolution Algorithm for Multi-Spectral Remote Sensing Images

W. Jino Hans, N. Venkateswaran, Lysiya Merlin.S, 2016 .

Swarm Optimization Based Dual Transform Algorithm for Secure Transaction of Medical Images

J. Valarmathi, N. Venkateswaran, Anusudha Krishnamurthi, 2014, FICTA.

Secured medical image watermarking with DNA codec

N. Venkateswaran, J. Valarmathi, Anusudha Krishnamurthi, 2015, Multimedia Tools and Applications.

Recursive Gabor transform for images of very large size and design of massively parallel architecture

C. Srinivasan, S. Swaminathan, N. Venkateswaran, 1997, Proceedings Fourth International Conference on High-Performance Computing.

Synthesis and Evaluation of Improved Reference Matrix Models for High Capacity Image Steganography

N. Venkateswaran, Taruna Sudhakar, Sundar Sripada Venugopalaswamy Sriraman, 2020, 2020 International Conference on Artificial Intelligence and Signal Processing (AISP).

General Purpose Processor Architecture for Modeling Stochastic Biological Neuronal Assemblies

N. Venkateswaran, C. Chandramouli, C. Chandramouli, 2003, ICES.

Fault tolerant bus architecture for deep submicron based processors

S. Balaji, V. Sridhar, N. Venkateswaran, 2005, CARN.

A Design Methodology for Very Large Array Processors - Part 2: Pacube VLSI Arrays

G. Sriram, R. Srinivasan, N. Venkateswaran, 1995, Int. J. Pattern Recognit. Artif. Intell..

Crosstalk fault tolerant processor architecture-a power aware design

T. L. Rajaprabhu, S. Subramanian, V. Balaji, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.