Huaxiang Yin

发表

Process variation dependence of total ionizing dose effects in bulk nFinFETs

Bo Li, Ling Yang, Haibin Wang, 2018, Microelectron. Reliab..

Integration Issue of Tensile SiN Liner for Dual Stress Liner(DSL) in Gate-Last High-k/Metal Gate(HKMG) Process Flow

Qiang Xu, Tao Yang, Peizhen Hong, 2013 .

Device parameter optimization for sub-20 nm node HK/MG-last bulk FinFETs

Qiang Xu, Jun Luo, Junfeng Li, 2015 .

Constant voltage stress characterization of nFinFET transistor during total ionizing dose experiment

Bo Li, Ling Yang, Yang Huang, 2018, Microelectron. Reliab..

Advanced Poly-Si TFT with Fin-Like Channels (先端デバイスの基礎と応用に関するアジアワークショップ(AWAD2005))

Takashi Noguchi, Jang-Yeon Kwon, Huaxiang Yin, 2005 .

Comparative Study on the Energy Profile of NBTI-Related Defects in Si and Ferroelectric p-FinFETs

Huaxiang Yin, Zhigang Ji, Qingzhu Zhang, 2020, 2020 IEEE International Reliability Physics Symposium (IRPS).

Study of HKMG Stack Interface Engineer Applicable to 22nm/16nm Finfet Mosfet

Ying Luo, Chao Zhao, Junfeng Li, 2014 .

Characterization of Advanced Gate Architecture Stress on 22nm Gate-Last CMOS Device

Xiaolong Ma, Huaxiang Yin, Zuozhen Fu, 2012 .

High-quality HfSiON gate dielectric and its application in a gate-last NMOSFET fabrication

Xiaobin He, Dapeng Chen, Chao Zhao, 2013, 2013 IEEE International Conference of Electron Devices and Solid-state Circuits.

Investigation on negative capacitance FinEFT beyond 7 nm node from device to circuit

Qiang Huo, Huilong Zhu, Huaxiang Yin, 2021, Microelectron. J..

A Fast DCIV Technique for Characterizing the Generation and Repassivation of Interface Traps Under DC/ AC NBTI Stress/Recovery Condition in Si p-FinFETs

Eddy Simoen, Chao Zhao, Zhigang Ji, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Comparative Study on the Energy Distribution of Defects under HCD and NBTI in Short Channel p-FinFETs

Eddy Simoen, Zhigang Ji, Huaxiang Yin, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Transistor Compact Model Based on Multigradient Neural Network and Its Application in SPICE Circuit Simulations for Gate-All-Around Si Cold Source FETs

Jing Wan, Guangxi Hu, Huaxiang Yin, 2021, IEEE Transactions on Electron Devices.

Ultra low sheet resistance on poly silicon film by excimer laser activation

Do-Young Kim, Jang-Yeon Kwon, Takashi Noguchi, 2006 .

180nm gate length amorphous InGaZnO thin film transistor for high density image sensor applications

U-In Chung, Hojung Kim, Sanghun Jeon, 2010, 2010 International Electron Devices Meeting.

The investigation of key technologies for sub-0.1-/spl mu/m CMOS device fabrication

Honghao Ji, Huaxiang Yin, Dexin Wu, 2001 .

Program/Erase Characteristics of Amorphous Gallium Indium Zinc Oxide Nonvolatile Memory

Huaxiang Yin, Chang Jung Kim, Ihun Song, 2008, IEEE Transactions on Electron Devices.

Source/Drain Formation of Self-Aligned Top-Gate Amorphous GaInZnO Thin-Film Transistors by $\hbox{NH}_{3}$ Plasma Treatment

Changjung Kim, Eunha Lee, Huaxiang Yin, 2009, IEEE Electron Device Letters.

Novel 14-nm Scallop-Shaped FinFETs (S-FinFETs) on Bulk-Si Substrate

Peizhen Hong, Huaxiang Yin, Miao Xu, 2015, Nanoscale Research Letters.

Study of sigma-shaped source/drain recesses for embedded-SiGe pMOSFETs

Peizhen Hong, Chao Zhao, Huilong Zhu, 2017 .

Impact of ALD TiN Capping Layer on Interface Trap and Channel Hot Carrier Reliability of HKMG nMOSFETs

Tianchun Ye, Bo Tang, Eddy Simoen, 2018, IEEE Electron Device Letters.

Investigation of TiAlC by Atomic Layer Deposition as N Type Work Function Metal for FinFET

Chao Zhao, Hushan Cui, Huaxiang Yin, 2015 .

Bootstrapped ring oscillator with propagation delay time below 1.0 nsec/stage by standard 0.5µm bottom-gate amorphous Ga2O3-In2O3-ZnO TFT technology

Huaxiang Yin, Sung-Hoon Lee, Chang Jung Kim, 2008, 2008 IEEE International Electron Devices Meeting.

Fabrication and Characterization of p-Channel Charge Trapping Type FOI-FinFET Memory with MAHAS Structure

Jie Gu, Huaxiang Yin, Changliang Qin, 2017 .

Double gate GaInZnO thin film transistors

Huaxiang Yin, Y. S. Park, Donghun Kang, 2008 .

Integration of Highly Strained SiGe in Source and Drain with HK and MG for 22 nm Bulk PMOS Transistors

Tianchun Ye, Jun Xu, Chao Zhao, 2017, Nanoscale Research Letters.

Self-Aligned Fin-On-Oxide (FOO) FinFETs for Improved SCE Immunity and Multi-VTH Operation on Si Substrate

Peizhen Hong, Huaxiang Yin, Weijia Xu, 2015 .

Near-ideal subthreshold swing MoS2 back-gate transistors with an optimized ultrathin HfO2 dielectric layer

Huaxiang Yin, Zhenhua Wu, Qingzhu Zhang, 2019, Nanotechnology.

Self-aligned top-gate amorphous gallium indium zinc oxide thin film transistors

Kee-Won Kwon, Young-soo Park, Eunha Lee, 2008 .

Total Ionizing Dose Response and Annealing Behavior of Bulk nFinFETs With ON-State Bias Irradiation

Qi Guo, Zhengsheng Han, Jiajun Luo, 2018, IEEE Transactions on Nuclear Science.

Integration of Selective Epitaxial Growth of SiGe/Ge Layers in 14nm Node FinFETs

Tianchun Ye, Junjie Li, Chao Zhao, 2016 .

Novel GAA Si Nanowire p-MOSFETs With Excellent Short-Channel Effect Immunity via an Advanced Forming Process

Tianchun Ye, Junjie Li, Chao Zhao, 2018, IEEE Electron Device Letters.

Source/Drain Series-Resistance Effects in Amorphous Gallium–Indium Zinc-Oxide Thin Film Transistors

Kee-Won Kwon, Changjung Kim, Eunha Lee, 2008, IEEE Electron Device Letters.

Improved Short Channel Effect Control in Bulk FinFETs With Vertical Implantation to Form Self-Aligned Halo and Punch-Through Stop Pocket

Tianchun Ye, Chao Zhao, Huilong Zhu, 2015, IEEE Electron Device Letters.

Dummy Poly Silicon Gate Removal by Wet Chemical Etching

Chao Zhao, Huaxiang Yin, Qiuxia Xu, 2011 .

Integration of highly-strained SiGe materials in 14 nm and beyond nodes FinFET technology

Chao Zhao, Huilong Zhu, Jun Luo, 2015 .

Short Channel Characteristics of Gallium–Indium–Zinc–Oxide Thin Film Transistors for Three-Dimensional Stacking Memory

Eunha Lee, Huaxiang Yin, Chang Jung Kim, 2008, IEEE Electron Device Letters.

FOI FinFET with ultra-low parasitic resistance enabled by fully metallic source and drain formation on isolated bulk-fin

Tianchun Ye, Junjie Li, Chao Zhao, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

CMP-Less Planarization Technology with SOG/LTO Etchback for Low Cost 70nm Gate-Last Process

Chao Zhao, Huaxiang Yin, Tao Yang, 2011 .

High performance low voltage amorphous oxide TFT Enhancement/Depletion inverter through uni-/bi-layer channel hybrid integration

Sanghun Jeon, Huaxiang Yin, Chang Jung Kim, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

pMOSFETs Featuring ALD W Filling Metal Using SiH4 and B2H6 Precursors in 22 nm Node CMOS Technology

Tianchun Ye, Chao Zhao, Huilong Zhu, 2017, Nanoscale Research Letters.

Investigation of thermal atomic layer deposited TiAlX (X = N or C) film as metal gate

Chao Zhao, Huaxiang Yin, Jinjuan Xiang, 2016 .

Low‐Temperature‐Grown Transition Metal Oxide Based Storage Materials and Oxide Transistors for High‐Density Non‐volatile Memory

Young-soo Park, Huaxiang Yin, Seung-Eon Ahn, 2009 .