Radhamanjari Samanta

Timing-Driven Routing in VLSI Physical Design Under Uncertainty

Radhamanjari Samanta, Radhamanjari Samanta, 2013 .

Submitted For the Degree of Doctor of Philosophy in the Faculty of Engineering

Radhamanjari Samanta, Radhamanjari Samanta, 2013 .

LESAR: A dynamic line-end spacing aware detailed router

Yih-Lang Li, Radhamanjari Samanta, Ying-Chi Wei, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A provably tight delay-driven concurrently congestion mitigating global routing algorithm

Adil I. Erzin, Soumyendu Raha, Vyacheslav V. Zalyubovskiy, 2015, Appl. Math. Comput..

A Timing Driven Congestion Aware Global Router

Soumyendu Raha, Radhamanjari Samanta, A.I. Erzin, 2011, 2011 Second International Conference on Emerging Applications of Information Technology.

Clock tree aware post-global placement optimization

Yih-Lang Li, Radhamanjari Samanta, Hong-Yan Su, 2017, 2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM).

Timing-driven Steiner tree construction on uniform λ-geometry

Adil I. Erzin, Soumyendu Raha, Radhamanjari Samanta, 2014, 18th International Symposium on VLSI Design and Test.

DFARPA: Differential fault attack resistant physical design automation

Debdeep Mukhopadhyay, Anupam Chattopadhyay, Rajat Subhra Chakraborty, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).