R. Weerasekera

Monolithic integration of high capacitance (power/ground) and low

H. Y. Li, G. Katti, Y. Weiliang, 2015, 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

Nanodevices: from novelty toys to functional devices - an integration perspective

R. Weerasekera, D. Pamunuwa, 2006, First International Conference on Industrial and Information Systems.

Exploration of Autonomous Error-Tolerant (AET) Celluar Networks in System-on-a Package (SoP) for Future Nanoscle Electronic Systems

H. Tenhunen, L.-R. Zheng, R. Weerasekera, 2006, First International Conference on Industrial and Information Systems.

An on-chip low power clock multiplier unit in 0.25 micron technology

R. Weerasekera, M.T.H. Setu, G.R.K. Raju, 2005, Canadian Conference on Electrical and Computer Engineering, 2005..

A Nanocore/CMOS Hybrid System-on-Package (SoP) Architecture for Future Nanoelectronic Systems

Jian Liu, Li-Rong Zheng, H. Tenhunen, 2005, 2005 Conference on High Density Microsystem Design and Packaging and Component Failure Analysis.

Crosstalk immune interconnect driver design

Li-Rong Zheng, H. Tenhunen, R. Weerasekera, 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

High Frequency Characterization of Inkjet Printed Coplanar Waveguides

Li-Rong Zheng, Botao Shao, R. Weerasekera, 2008, 2008 12th IEEE Workshop on Signal Propagation on Interconnects.

High frequency characterization and modelling of inkjet printed interconnects on flexible substrate for low-cost RFID applications

Li-Rong Zheng, Botao Shao, R. Weerasekera, 2008, 2008 2nd Electronics System-Integration Technology Conference.