Anthony Chan Carusone

发表

A 6.5 Gb/s backplane transmitter with 6-tap FIR equalizer and variable tap spacing

Mike Bichan, Anthony Chan Carusone, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Obtaining digital gradient signals for analog adaptive filters

Anthony Chan Carusone, David A. Johns, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Analogue adaptive filters: past and present

Anthony Chan Carusone, David A. Johns, 2000 .

All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters

Hong Zhang, Anthony Chan Carusone, Shuai Chen, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

High-performance chip-to-chip signaling

Anthony Chan Carusone, 2008, ICECS.

A 19-GHz Broadband Amplifier Using a gm-Boosted Cascode in 0.18-μm CMOS

Masum Hossain, Anthony Chan Carusone, Masum Hossain, 2006, IEEE Custom Integrated Circuits Conference 2006.

A comparison of equalizers for compensating polarization-mode dispersion in 40-Gb/s optical systems

Anthony Chan Carusone, Jonathan Sewter, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Multi-Gb/s Bit-by-Bit Receiver Architectures for 1-D Partial-Response Channels

Masum Hossain, Anthony Chan Carusone, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Hardware reduction by combining pipelined A/D conversion and FIR filtering for channel equalization

Anthony Chan Carusone, Shahriar Shahramian, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A 5-Gbit/s CMOS Optical Receiver With Integrated Spatially Modulated Light Detector and Equalization

Anthony Chan Carusone, Tony Shuo-Chun Kao, Faisal A. Musa, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 6.8mW 7.4Gb/s clock-forwarded receiver with up to 300MHz jitter tracking in 65nm CMOS

Masum Hossain, Anthony Chan Carusone, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Decision Feedback Equalizer Architectures With Multiple Continuous-Time Infinite Impulse Response Filters

Anthony Chan Carusone, Shayan Shahramian, Hemesh Yasotharan, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

Introduction to the Special Issue on the IEEE 2009 Custom Integrated Circuits Conference

Pavan Kumar Hanumolu, Anthony Chan Carusone, Ramesh Harjani, 2010 .

A 32/16-Gb/s Dual-Mode Pulsewidth Modulation Pre-Emphasis (PWM-PE) Transmitter With 30-dB Loss Compensation Using a High-Speed CML Design Methodology

Anthony Chan Carusone, Faisal A. Musa, Horace Cheng, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

TDC Sharing in SPAD-Based Direct Time-of-Flight 3D Imaging Applications

Anthony Chan Carusone, Foad Arvani, Edward S. Rogers, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Direct Time-of-Flight TCSPC Analytical Modeling Including Dead-Time Effects

Anthony Chan Carusone, Foad Arvani, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Capacitively-Coupled CMOS VCSEL Driver Circuits

Anthony Chan Carusone, Victor Kozlov, A. C. Carusone, 2016, IEEE Journal of Solid-State Circuits.

Discrete Multitone Signalling for Wireline Communication

Anthony Chan Carusone, Nijwm Wary, Behraz Vatankhahghadim, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

A 3.3-Gbps bit-serial block-interlaced min-sum LDPC decoder in 0.13-μm CMOS

Frank R. Kschischang, Anthony Chan Carusone, Ahmad Darabiha, 2007, 2007 IEEE Custom Integrated Circuits Conference.

Multi-phase bang-bang digital phase lock loop with accelerated frequency acquisition

Anthony Chan Carusone, Amer Samarah, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Adaptive receivers for high-speed wireline links

Anthony Chan Carusone, Dustin Dunwell, A. C. Carusone, 2013 .

Modeling Oscillator Injection Locking Using the Phase Domain Response

Anthony Chan Carusone, Dustin Dunwell, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 5th order Gm-C filter in 0.25 /spl mu/m CMOS with digitally programmable poles and zeroes

Anthony Chan Carusone, David A. Johns, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Gain and equalization adaptation to optimize the vertical eye opening in a wireline receiver

Anthony Chan Carusone, Dustin Dunwell, 2010, IEEE Custom Integrated Circuits Conference 2010.

Progress and trends in multi-Gbps optical receivers with CMOS integrated photodetectors

Anthony Chan Carusone, Tony Shuo-Chun Kao, Hemesh Yasotharan, 2010, IEEE Custom Integrated Circuits Conference 2010.

Differential signaling with a reduced number of signal paths

Anthony Chan Carusone, David A. Johns, K. Farzan, 2001 .

A Methodology for Accurate DFE Characterization

Anthony Chan Carusone, Alireza Sharif-Bakhtiar, 2018, 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

A 32/16 Gb/s 4/2-PAM transmitter with PWM pre-Emphasis and 1.2 Vpp per side output swing in 0.13-μm CMOS

Anthony Chan Carusone, Horace Cheng, 2008, 2008 IEEE Custom Integrated Circuits Conference.

30.5 A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS

Bo Wang, Anthony Chan Carusone, David Cassan, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

A 1-1-1-1 MASH delta-sigma modulator using dynamic comparator-based OTAs

Anthony Chan Carusone, Kentaro Yamamoto, 2011, 2011 IEEE Custom Integrated Circuits Conference (CICC).

Introducing Jump-Start Tutorials

Un-Ku Moon, Anthony Chan Carusone, U. Moon, 2009, IEEE Trans. Circuits Syst. II Express Briefs.

Filtering ADCs for wireless receivers: A survey

Anthony Chan Carusone, Antonio Liscidini, Qiwei Wang, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

A Digital Phase-Locked Loop With Calibrated Coarse and Stochastic Fine TDC

Anthony Chan Carusone, Amer Samarah, A. C. Carusone, 2012, IEEE Journal of Solid-State Circuits.

A 64Gb/s PAM-4 transceiver utilizing an adaptive threshold ADC in 16nm FinFET

Anthony Chan Carusone, Luke Wang, Euhan Chong, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

A Nano-Watt MOS-Only Voltage Reference With High-Slope PTAT Voltage Generators

Anthony Chan Carusone, Hong Zhang, Ruizhi Zhang, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 1.55mW mixed-signal integrating mixer for direct spectrum estimation in 0.13μm CMOS

Anthony Chan Carusone, Kevin Banovic, 2012, 2012 IEEE Asian Solid State Circuits Conference (A-SSCC).

Design of a Dual W- and D-Band PLL

Sorin P. Voinigescu, Anthony Chan Carusone, Pascal Chevalier, 2011, IEEE Journal of Solid-State Circuits.

Statistical BER Analysis of Wireline Links With Non-Binary Linear Block Codes Subject to DFE Error Propagation

Ming Yang, Anthony Chan Carusone, Shayan Shahramian, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

F5: Frequency generation and clock distribution

SeongHwan Cho, Anthony Chan Carusone, Brian P. Otis, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Analog filter adaptation using a dithered linear search algorithm

Anthony Chan Carusone, David A. Johns, D. Johns, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A flexible hardware encoder for systematic low-density parity-check codes

Anthony Chan Carusone, Hemesh Yasotharan, A. C. Carusone, 2009, 2009 52nd IEEE International Midwest Symposium on Circuits and Systems.

A 40-GSamples/Sec Track & Hold Amplifier in 0.18µm SiGe BiCMOS Technology

Sorin P. Voinigescu, Anthony Chan Carusone, Edward S. Rogers, 2005 .

7.4 Gb/s 6.8 mW Source Synchronous Receiver in 65 nm CMOS

Masum Hossain, Anthony Chan Carusone, 2011, IEEE Journal of Solid-State Circuits.

A 0.3 pJ/bit 20 Gb/s/Wire Parallel Interface for Die-to-Die Communication

Anthony Chan Carusone, Behzad Dehlaghi, A. C. Carusone, 2016, IEEE Journal of Solid-State Circuits.

Ultra-short-reach interconnects for package-level integration

Anthony Chan Carusone, Davide Tonietto, Behzad Dehlaghi, 2016, 2016 IEEE Optical Interconnects Conference (OI).

Channel characterization using jitter measurements

Atul Gupta, Anthony Chan Carusone, Dustin Dunwell, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A Time-Interleaved $\Delta\Sigma$-DAC Architecture Clocked at the Nyquist Rate

Anthony Chan Carusone, Jennifer Pham, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

A LTE RX front-end with digitally programmable multi-band blocker cancellation in 28nm CMOS

Hajime Shibata, Anthony Chan Carusone, Antonio Liscidini, 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

A bit-serial approximate min-sum LDPC decoder and FPGA implementation

Frank R. Kschischang, Anthony Chan Carusone, Ahmad Darabiha, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A 15-Gb/s preamplifier with 10-dB gain control and 8-mV sensitivity in 65-nm CMOS

Anthony Chan Carusone, Dustin Dunwell, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links

Mike Bichan, Anthony Chan Carusone, 2007, 2007 IEEE International Symposium on Circuits and Systems.

The effect of redundancy on mismatch-induced offset and random noise in a dynamic comparator

Mike Bichan, Anthony Chan Carusone, 2009, 2009 Ph.D. Research in Microelectronics and Electronics.

A 40 Gb/s transversal filter in 0.18 /spl mu/m CMOS using distributed amplifiers

Anthony Chan Carusone, Jonathan Sewter, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

A Baud-Rate Timing Recovery Scheme With a Dual-Function Analog Filter

Anthony Chan Carusone, Faisal A. Musa, 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

23.7 A 16Gb/s 1 IIR + 1 DT DFE compensating 28dB loss with edge-based adaptation converging in 5µs

Anthony Chan Carusone, Shayan Shahramian, Behzad Dehlaghi, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

Introduction to the Special Issue on the 2008 IEEE Custom Integrated Circuits Conference

Anthony Chan Carusone, Payam Heydari, Lawrence T. Clark, 2009, IEEE J. Solid State Circuits.

A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers

Hajime Shibata, Anthony Chan Carusone, Antonio Liscidini, 2018, IEEE Journal of Solid-State Circuits.

A passive resonant clocking network for distribution of a 2.5-GHz clock in a flash ADC

Mike Bichan, Anthony Chan Carusone, Qiwei Wang, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Editorial ISCAS 2006 Special Section on Analog Circuits and Systems

Anthony Chan Carusone, Tuna B. Tarim, 2007, IEEE Trans. Circuits Syst. I Regul. Pap..

Edge-Based Adaptation for a 1 IIR + 1 Discrete-Time Tap DFE Converging in $5~\mu$ s

Anthony Chan Carusone, Shayan Shahramian, Behzad Dehlaghi, 2016, IEEE Journal of Solid-State Circuits.

A sub-mW spectrum sensing architecture for portable IEEE 802.22 cognitive radio applications

Anthony Chan Carusone, Kevin Banovic, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A 4-GS/s Single Channel Reconfigurable Folding Flash ADC for Wireline Applications in 16-nm FinFET

Anthony Chan Carusone, Luke Wang, Marc-Andre LaCroix, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

A passive filter aided timing recovery scheme

Anthony Chan Carusone, Faisal A. Musa, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Analogue adaptive filters

Anthony Chan Carusone, David A. Johns, 2002 .

A Time-Interleaved -DAC Architecture Clocked at the Nyquist Rate

Anthony Chan Carusone, Jennifer Pham, 2008 .

10–40 Gb/s I/O design for data communications

Anthony Chan Carusone, Ken Chang, Ali Sheikholeslami, 2012, 2012 IEEE International Solid-State Circuits Conference.

A 19.6-Gbps CMOS optical receiver with local feedback IIR DFE

Anthony Chan Carusone, Alireza Sharif Bakhtiar, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

A 2.3–4GHz injection-locked clock multiplier with 55.7% lock range and 10-ns power-on

Jared Zerbe, Barry Daly, Anthony Chan Carusone, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

Equalizer Architectures for 40-Gb/s Optical Systems Limited by Polarization-Mode Dispersion

Anthony Chan Carusone, J. Sewter, 2005 .

A 1-1-1-1 MASH Delta-Sigma Modulator With Dynamic Comparator-Based OTAs

Anthony Chan Carusone, Kentaro Yamamoto, 2012, IEEE Journal of Solid-State Circuits.

A Sub-mW Integrating Mixer SAR Spectrum Sensor for Portable Cognitive Radio Applications

Anthony Chan Carusone, Kevin Banović, A. C. Carusone, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

5–10 Gb/s 70 mW Burst Mode AC Coupled Receiver in 90-nm CMOS

Masum Hossain, Anthony Chan Carusone, 2010, IEEE Journal of Solid-State Circuits.

Cycle-slipping pull-in range of bang-bang PLLs

Anthony Chan Carusone, Amer Samarah, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

Front-End Circuits for Multi-Gb/s Chip-to-Chip Links

Anthony Chan Carusone, A. C. Carusone, 2008, Circuits at the Nanoscale.

Power Reduction Techniques for LDPC Decoders

Frank R. Kschischang, Anthony Chan Carusone, Ahmad Darabiha, 2008, IEEE Journal of Solid-State Circuits.

A dead-zone free and linearized digital PLL

Anthony Chan Carusone, Amer Samarah, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Jitter equalization for binary baseband communication

Anthony Chan Carusone, 2005, 2005 IEEE International Symposium on Circuits and Systems.

DIGITAL ALGORITHMS FOR ANALOG ADAPTIVE FILTERS

Anthony Chan Carusone, A. C. Carusone, 2002 .

Multi-Gbit/sec low density parity check decoders with reduced interconnect complexity

Frank R. Kschischang, Anthony Chan Carusone, Ahmad Darabiha, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Clock recovery in high-speed multilevel serial links

Anthony Chan Carusone, Faisal A. Musa, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Modeling and Design of Multilevel Bang–Bang CDRs in the Presence of ISI and Noise

Anthony Chan Carusone, Faisal A. Musa, 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 10Gb/s 4.1mW 2-IIR + 1-discrete-tap DFE in 28nm-LP CMOS

Anthony Chan Carusone, Shayan Shahramian, 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).

A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology

Sorin P. Voinigescu, Anthony Chan Carusone, Shahriar Shahramian, 2006, IEEE Custom Integrated Circuits Conference 2006.

A 20 Gb/s 0.3 pJ/b single-ended die-to-die transceiver in 28 nm-SOI CMOS

Anthony Chan Carusone, Behzad Dehlaghi, 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).

A 20 Gb/s CMOS Optical Receiver With Limited-Bandwidth Front End and Local Feedback IIR-DFE

Anthony Chan Carusone, Alireza Sharif Bakhtiar, A. C. Carusone, 2016, IEEE J. Solid State Circuits.

CMOS Technology Scaling Considerations for Multi-Gbps Optical Receivers With Integrated Photodetectors

Anthony Chan Carusone, Tony Shuo-Chun Kao, Hemesh Yasotharan, 2011, IEEE Journal of Solid-State Circuits.

A Delta-Sigma Modulator With a Widely Programmable Center Frequency and 82-dB Peak SNDR

Anthony Chan Carusone, Kentaro Yamamoto, Francis P. Dawson, 2008, IEEE Journal of Solid-State Circuits.

An Adaptive Spatial Blocker Cancellation Receiver for Multiple Antenna Systems

Anthony Chan Carusone, Rudraneil Saha, 2020, 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS).

20 GHz low power QVCO and De-skew techniques in 0.13μm digital CMOS

Masum Hossain, Anthony Chan Carusone, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Block-Interlaced LDPC Decoders With Reduced Interconnect Complexity

Frank R. Kschischang, Anthony Chan Carusone, Ahmad Darabiha, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

A sigma-delta based open-loop frequency modulator

Anthony Chan Carusone, Denis Daly, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Guest Editorial Special Issue on ISCAS 2008

Hanspeter Schmid, Yehea I. Ismail, Wouter A. Serdijn, 2009, IEEE Trans. Circuits Syst. I Regul. Pap..

A 0.41 pJ/Bit 10 Gb/s Hybrid 2 IIR and 1 Discrete-Time DFE Tap in 28 nm-LP CMOS

Anthony Chan Carusone, Shayan Shahramian, 2015, IEEE Journal of Solid-State Circuits.

A 40-Gbps 0.5-pJ/bit VCSEL driver in 28nm CMOS with complex zero equalizer

Anthony Chan Carusone, Alireza Sharif Bakhtiar, Michael G. Lee, 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

An Equalizer Adaptation Algorithm to Reduce Jitter in Binary Receivers

Anthony Chan Carusone, 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

Low-power CMOS receivers for short reach optical communication

Anthony Chan Carusone, Alireza Sharif Bakhtiar, Michael G. Lee, 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

A 5.6Gb/s 2.4mW/Gb/s bidirectional link with 8ns power-on

Jared Zerbe, Barry Daly, Wayne Dettloff, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

Time interleaved C-2C SAR ADC with background timing skew calibration in 65nm CMOS

Anthony Chan Carusone, Qiwei Wang, Luke Wang, 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).

All-Digital Calibration Algorithms to Correct for Static Non-Linearities in ADCs

Anthony Chan Carusone, Qiwei Wang, Luke Wang, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

Pre-FEC and Post-FEC BER as Criteria for Optimizing Wireline Transceivers

Anthony Chan Carusone, Shayan Shahramian, Peter Krotnev, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

F6: Optical and Electrical Transceivers for 400GbE and Beyond

Munehiko Nagatani, Franz Dielacher, Thomas Toifl, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Design methodology for a 40-GSamples/s track and hold amplifier in 0.18-μm SiGe BiCMOS technology

Sorin P. Voinigescu, Anthony Chan Carusone, Shahriar Shahramian, 2006 .

Digital LMS adaptation of analog filters without gradient information

Anthony Chan Carusone, David A. Johns, D. Johns, 2003, IEEE Trans. Circuits Syst. II Express Briefs.

A 5-Gbps optical receiver with monolithically integrated photodetector in 0.18-µm CMOS

Anthony Chan Carusone, Tony Shuo-Chun Kao, A. C. Carusone, 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

Interconnect Technologies for Terabit-per-Second Die-to-Die Interfaces

Anthony Chan Carusone, Davide Tonietto, Behzad Dehlaghi, 2016, 2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).

An 81 Gb / s , 1 . 2 V TIALA-Retimer in Standard 65 nm CMOS

Sorin P. Voinigescu, Anthony Chan Carusone, Peter Schvan, 2008 .

A 1 . 55 mW Mixed-Signal Integrating Mixer for Direct Spectrum Estimation in 0 . 13 μ m CMOS

Anthony Chan Carusone, Kevin Banović, 2012 .

International Solid-State Circuits Conference ISSCC 2018 / SESSION 6 / ULTRA-HIGH-SPEED WIRELINE / 6 . 5 6 . 5 A 64 Gb / s PAM-4 Transceiver Utilizing an Adaptive Threshold ADC in 16 nm FinFET

Anthony Chan Carusone, Luke Wang, Euhan Chong, 2019 .

A 15Gb/s AC-Coupled VCSEL Driver with Waveform Shaping in 65nm CMOS

Anthony Chan Carusone, Victor Kozlov, A. C. Carusone, 2015, 2015 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).