Shigeo Kuninobu

Layout Abstraction and Technology Retargeting for Leaf Cells (Special Section on VLSI Design and CAD Algorithms)

Masahiro Fukui, Noriko Shinomiya, Toshiro Akino, 1998 .

High Speed MOS Multiplier and Divider Using Redundant Binary Representation and Their Implementation in a Microprocessor (Special Issue on Multiple-Valued Integrated Circuits)

Takashi Taniguchi, Shigeo Kuninobu, Tamotsu Nishiyama, 1993 .

Design of high speed MOS multiplier and divider using redundant binary representation

Naofumi Takagi, Takashi Taniguchi, Shigeo Kuninobu, 1987, 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH).

Accurate Ronding Scheme for the Newton-Raphson Method Using Redundant Binary Representation

Akira Miyoshi, Hitoshi Yamashita, Takashi Taniguchi, 1994, IEEE Trans. Computers.

A Two-Dimensional Transistor Placement Algorithm for Cell Synthesis and Its Application to Standard Cells (Special Section on VLSI Design and CAD Algorithms)

Shunji Saika, Noriko Shinomiya, Toshiro Akino, 1997 .

A partial scan design method based on n-fold line-up structures

Toshihiro Hiraoka, Toshinori Hosokawa, Mitsuyasu Ohta, 1997, Proceedings Sixth Asian Test Symposium (ATS'97).