G.A. Jullien

Parallel median filtering using cellular neural networks

S. Sadeghi-Emamchaie, G.A. Jullien, W.C. Miller, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

On the use of animated sequences for pedagogical enhancement

G.A. Jullien, 1995, Conference Record of The Twenty-Ninth Asilomar Conference on Signals, Systems and Computers.

Overlap resolution: arithmetic with continuous valued digits in hybrid architectures

W.C. Miller, M. Ahmadi, A. Saed, 1997, Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136).

Design and FPGA implementation of systolic FIR filters using the Fermat number ALU

H. Safiri, M. Ahmadi, G.A. Jullien, 1996, Conference Record of The Thirtieth Asilomar Conference on Signals, Systems and Computers.

An applicative framework for video-rate systems programming

G.A. Jullien, D. Phoukas, 1995, Conference Record of The Twenty-Ninth Asilomar Conference on Signals, Systems and Computers.

Arithmetic arrays using cellular neural networks

S. Sadeghi-Emamchaie, G.A. Jullien, W.C. Miller, 1997, Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136).

On efficient techniques for difficult operations in one and two-digit DBNS index calculus

W.C. Miller, G.A. Jullien, V.S. Dimitrov, 2000, Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154).

Current input TSPC latch for high speed, complex switching trees

W.C. Miller, G.A. Jullien, P. Zhou, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Defect detection in web inspection using fuzzy fusion of texture features

J.W. Roberts, G.A. Jullien, S.H. Hajimowlana, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Woodchuck: a low-level synthesizer for dynamic pipelined DSP arithmetic logic blocks

W.C. Miller, G.A. Jullien, R. Grondin, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Analog digits: bit level redundancy in a binary multiplier

M. Ahmadi, A. Saed, G.A. Jullien, 1998, Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284).

Fault tolerant complex FIR filter architectures using a redundant MRRNS

A. Garg, L. Imbert, G.A. Jullien, 2001, Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems and Computers (Cat.No.01CH37256).

Contraharmonic filtering using cellular neural networks

S. Sadeghi-Emamchaie, G.A. Jullien, W.C. Miller, 1996, Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering.