Takaya Chiba

Clock signal generating circuit

Takaya Chiba, Hirotaka Tamura, 2003 .

A CMOS multi-channel 10-Gb/s Transceiver

Yoshiyasu Doi, Hirotaka Tamura, Satoshi Matsubara, 2003 .

A 0.8-1.3V 16-channel 2.5Gb/s high-speed serial transceiver in a 90nm standard CMOS process

Yoshiyasu Doi, Hirotaka Tamura, Junji Ogawa, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..