Fuminori Kobayashi

发表

A compressed implementation of neural network with finite physical quantities on FPGAs

T. Sotohebo, Minoru Watanabe, Fuminori Kobayashi, 2002, Proceedings of the 41st SICE Annual Conference. SICE 2002..

MISC: Mono Instruction-Set Computer based on Dynamic Reconfiguration - a 6502 Perspective

Minoru Watanabe, Fuminori Kobayashi, Yasuyuki Morikawa, 2008, ERSA.

A Modified Repetitive Control Accommodating Changes in the Reference Period and Its Application

Fuminori Kobayashi, Yohichi Kimura, Senji Watanabe, 1990 .

Testing Method for Optical Connections Using Gate Array Structure in ORGAs

Minoru Watanabe, Fuminori Kobayashi, 2004, ERSA.

A Motor Speed Servo System Based on the Dual Loop PLL

Fuminori Kobayashi, Hidekazu Machida, Michinobu Kambara, 2011 .

An optically differential reconfigurable gate array with a holographic memory

Minoru Watanabe, Fuminori Kobayashi, Mototsugu Miyano, 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

Computer and Communication in Dream

Fuminori Kobayashi, 2000 .

Holographic memory reconfigurable VLSI

Minoru Watanabe, Fuminori Kobayashi, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Design of single-phase grid-connected based on dual-mppt for photovoltaic generation systems

Fuminori Kobayashi, Slamet, Rasli Bin Abd Ghani, 2016 .

A Fast SVM-Based Tongue's Colour Classification Aided by k-Means Clustering Identifiers and Colour Attributes as Computer-Assisted Tool for Tongue Diagnosis

Chia Yee Ooi, Fuminori Kobayashi, Nur Diyana Kamarudin, 2017, Journal of healthcare engineering.

Analysis of Changes in Temperature and Irradiance to DC-DC Buck Converter Based on IP Controller for Solar Power Plant Application

Fuminori Kobayashi, Slamet, Rasli bin Abd Ghani, 2015 .

An improved dynamic optically reconfigurable gate array

Minoru Watanabe, Fuminori Kobayashi, 2005, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05).

A neural network using finite physical quantities

Fuminori Kobayashi, Minoru Watanabe, 2002 .

A 16,000-gate-count optically reconfigurable gate array in a standard 0.35 /spl mu/m CMOS technology

Minoru Watanabe, Fuminori Kobayashi, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A Unified Curriculum for Microcomputer Experiments in a Department of Mechanical Engineering

Fuminori Kobayashi, Hiroshi Sakuta, Yutaka Yoshitani, 1986 .

Logic Synthesis and Place-and-Route Environment for ORGAs

Minoru Watanabe, Fuminori Kobayashi, Minoru Watanabe, 2006, ERSA.

Characteristics Improvement of PLLs Using Phase Interpolation

Manabu Inoue, Minoru Watanabe, Fuminori Kobayashi, 2006 .

A zero-overhead dynamic optically reconfigurable gate array

Minoru Watanabe, Fuminori Kobayashi, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

A Method of Parallel Processing of P-Code Pascal Programms

Fuminori Kobayashi, Nobuo Takehira, Hitcshi Kondoh, 1988 .

Small Area Implementation for Optically Reconfigurable Gate Array VLSI: FFT Case

Minoru Watanabe, Fuminori Kobayashi, I. S. Abdul Halim, 2017 .

Rapid reconfiguration of an optically differential reconfigurable gate array with pulse lasers

Minoru Watanabe, Fuminori Kobayashi, Mototsugu Miyano, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

A finite physical quantity neural network VLSI with a learning capability

Fuminori Kobayashi, Minoru Watanabe, 2003, SICE 2003 Annual Conference (IEEE Cat. No.03TH8734).

An optically differential reconfigurable gate array with a dynamic reconfiguration circuit

Minoru Watanabe, Fuminori Kobayashi, 2003, Proceedings International Parallel and Distributed Processing Symposium.

A Lean Development Approach in Domestic Refrigerator Energy Saving Design with a combination of Digital tool, Real experiment and Humanistic collaboration.: ～擦り合わせ型冷熱空調家電におけるリーン製品開発プロセス～

Tsuyoshi Seike, Takashi Kobayashi, Fuminori Kobayashi, 2018 .

PLL/PID Motor Control System by Using Time-Domain Differential Operation of PWM Signal

Fuminori Kobayashi, Hidekazu Machida, 2007 .

An optically differential reconfigurable gate array and its power consumption estimation

Minoru Watanabe, Fuminori Kobayashi, 2002, 2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings..

Optically reconflgurable gate array with a polymer-dispersed liquid crystal holographic memory

Minoru Watanabe, Fuminori Kobayashi, Akifumi Ogiwara, 2011, 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

A 1, 632 Gate-Count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI

Minoru Watanabe, Fuminori Kobayashi, 2006, ARC.

A digital PLL with finite impulse responses

Fuminori Kobayashi, Masayuki Haratsu, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

Low-jitter PLL by interpolate compensation

Fuminori Kobayashi, Yutaka Nakanishi, Hitoshi Kondoh, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Optically Reconfigurable Gate Arrays vs. ASICs

Minoru Watanabe, Fuminori Kobayashi, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

An optically differential reconfigurable gate array VLSI chip with a dynamic reconfiguration circuit

Minoru Watanabe, Fuminori Kobayashi, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

A 0.35um CMOS 1,632-gate-count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI

Minoru Watanabe, Fuminori Kobayashi, 2007, 2007 Asia and South Pacific Design Automation Conference.

Parallel Branch and Bound Method Using Systematic Shuffling

Fuminori Kobayashi, Shinji Hara, Hitoshi Kondoh, 1993 .

Analog dynamic reconfiguration for area-efficient implementation

Fuminori Kobayashi, Shintaro Higuchi, F. Kobayashi, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

A motor speed control system using dual-loop PLL and speed feed-forward/back

Fuminori Kobayashi, Michinobu Kambara, Kouta Tanaka, 2010, 2010 IEEE International Conference on Mechatronics and Automation.

Automatic Melody Generation Based on the Chord of Backing and Musical Knowledge

Takashi Ogata, Fuminori Kobayashi, 2002 .

Area-Efficient Analog Operations by Dynamicly-Reconfigured Switched-Capacitor Circuits

Fuminori Kobayashi, Shintaro Higuchi, Mohamad Zain, 2018, 2018 International Conference on Applied Electronics (AE).

Integrally accurate resolver-to-digital converter (RDC)

Manabu Inoue, Fuminori Kobayashi, Nordinah Ismail, 2015, 2015 10th Asian Control Conference (ASCC).

Inter-chip synchronism in dynamically reconfigurable analog circuits for intelligent engineering systems

Fuminori Kobayashi, Shintaro Higuchi, Junaidah Bt Zakaria, 2017, 2017 IEEE 21st International Conference on Intelligent Engineering Systems (INES).

A PLL configuration for reducing both incoming and inherent jitters

Fuminori Kobayashi, Hitoshi Kondoh, Yuhta Egashira, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

A practical design integration method for hierarchical architecture type product system (A lean development process in domestic refrigerator energy saving design with a combination of digital tool, real experiment and humanistic collaboration)

Tsuyoshi Seike, Takashi Kobayashi, Fuminori Kobayashi, 2019 .

Multi-context optically reconfigurable gate array using a polymer-dispersed liquid crystal holographic memory

Fuminori Kobayashi, Minoru Watanabe, Akifumi Ogiwara, 2011, 17th Microopics Conference (MOC).

Application of Data Analytics and Machine Learning in Mechanical Design Practice

Tsuyoshi Seike, Takashi Kobayashi, Fuminori Kobayashi, 2018 .

A System Design Approach for Integral Architecture Type Home Appliances Products: - An Application for Total Design of Refrigeration Cycle and Condensing Device on Domestic Refrigerator -

Tsuyoshi Seike, Takashi Kobayashi, Fuminori Kobayashi, 2017 .

A Lean Development Approach in Domestic RefrigeratorEnergy Saving Design with a combination of Digital tool, Real experiment and Humanistic collaboration.: 冷蔵庫省エネ開発事例とリーン開発的な視点からの一考察

Tsuyoshi Seike, Takashi Kobayashi, Fuminori Kobayashi, 2017 .

Highly-accurate PLL speed control by adding P+D repetitive control

Fuminori Kobayashi, Takashi Inoue, Hidekazu Machida, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

A fast and effective segmentation algorithm with automatic removal of ineffective features on tongue images

Chia Yee Ooi, Fuminori Kobayashi, Nur Diyana Kamarudin, 2016 .

A Bus Arbiter with Inter-Processor Synchronization for Parallel Processing of Operations

Fuminori Kobayashi, Hitoshi Kondoh, Nobuo Takehira, 1989 .

Direct optical communication on an optically reconfigurable gate array

Minoru Watanabe, Fuminori Kobayashi, Ili Shairah Abdul Halim, 2016, 2016 Fifth International Conference on Future Generation Communication Technologies (FGCT).

Fourier/filter hybrid sampling rate converter

Manabu Inoue, Minoru Watanabe, Fuminori Kobayashi, 2005 .

A motor speed control system using a hybrid of dual-loop PLL and feed-forward

Fuminori Kobayashi, Hidekazu Machida, Michinobu Kambara, 2010, 2010 11th IEEE International Workshop on Advanced Motion Control (AMC).

An optically differential reconfigurable gate array with a partial reconfiguration optical system and its power consumption estimation

Minoru Watanabe, Fuminori Kobayashi, Minoru Watanabe, 2004, 17th International Conference on VLSI Design. Proceedings..

Implementation of IncCond Algorithm to Optimize PI Boost Converter for Maximum Power Point Tracking in Photovoltaic Arrays

Fuminori Kobayashi, Slamet Slamet, Rasli bin Abd Ghani, 2014 .

A neural network model using finite physical quantities and its realization on LSIs

Minoru Watanabe, Fuminori Kobayashi, 2002, Proceedings of the 41st SICE Annual Conference. SICE 2002..

A High-Density Optically Reconfigurable Gate Array Using Dynamic Method

Minoru Watanabe, Fuminori Kobayashi, 2004, FPL.

A Digital Implementation of the Time-Optimal PLL

Fuminori Kobayashi, 1995 .

Scaling prospect of optically differential reconfigurable gate array VLSIs

Minoru Watanabe, Fuminori Kobayashi, Takenori Shiki, 2009 .

Efficient digital techniques for implementing a class of fast phase-locked loops (PLL's)

Michio Nakano, Fuminori Kobayashi, Masayuki Haratsu, 1996, IEEE Trans. Ind. Electron..

A low-jitter PLL for digital TV instrumentation

Fuminori Kobayashi, Yutaka Nakanishi, Hitoshi Kondoh, 2009, 2009 IEEE International Symposium on Industrial Electronics.

Timing Analysis of an Optically Differential Reconfigurable Gate Array for Dynamically Reconfigurable Processors

Minoru Watanabe, Fuminori Kobayashi, 2004, ERSA.

272 Gate Count Optically Differential Reconfigurable Gate Array VLSI

Minoru Watanabe, Fuminori Kobayashi, Takenori Shiki, 2007, ERSA.

Space-and-Cost-Efficient Neural Control /Sensory Element Using an Analog FPGA

Fuminori Kobayashi, Tetsuo Furukawa, 2019, 2019 International Conference on System Science and Engineering (ICSSE).

High manufacturing-defect tolerance optically programmable architecture

Fuminori Kobayashi, Minoru Watanabe, 2006 .

時間領域フーリエ補間による非同期サンプリング・レー卜・コンパータ

Fuminori Kobayashi, Manabu Inoue, Minoru Watanabe, 2007 .

Motion image compression circuit using the silicon retina as active sensor

Motoki Amagasaki, Fuminori Kobayashi, Minoru Watanabe, 2002, Proceedings of the 41st SICE Annual Conference. SICE 2002..

A PWM motor speed control system based on the dual-loop PLL

Fuminori Kobayashi, Hidekazu Machida, K. Tanaka, 2009, 2009 ICCAS-SICE.

Optically differential reconfigurable gate array

Minoru Watanabe, Fuminori Kobayashi, M. Miyano, 2007 .

Differential Reconfiguration Architecture suitable for a Holographic Memory

Minoru Watanabe, Fuminori Kobayashi, Mototsugu Miyano, 2006, ERSA.

A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35μm CMOS technology

Minoru Watanabe, Fuminori Kobayashi, 2006, ASP-DAC.

Highly precise rotational speed control by a hybrid of PLL and repetitive control

Fuminori Kobayashi, Takashi Inoue, Hidekazu Machida, 2012 .

A New Approach to Maximum Power Point Tracking for Sudden Changes in Irradiance in Photovoltaic Systems

Fuminori Kobayashi, Slamet, Rasli bin AbdGhani, 2018 .

Optically Differential Reconfigurable Gate Array Using an Optical System with VCSELs

Minoru Watanabe, Fuminori Kobayashi, Mototsugu Miyano, 2005, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05).

Power consumption advantage of a dynamic optically reconfigurable gate array

Minoru Watanabe, Fuminori Kobayashi, 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

3A04 卒業要件単位の取得を可能とする交換留学のプロジェクトマネジメント((31)オーガナイズドセッション:プロジェクトマネジメントとPBL-V,口頭発表)

Anak Khantachawana, Fuminori Kobayashi, 雅裕井上, 2015 .

A Variable-Speed Deburring Robot Using the Repetitive Control

Fuminori Kobayashi, Yoichi Kimura, Ryoji Mukai, 1989 .

A Reconfiguration Speed Adjustment Technique for ORGAs with a Holographic Memory

Minoru Watanabe, Fuminori Kobayashi, 2006, 2006 International Conference on Field Programmable Logic and Applications.

A multi-context holographic memory recording system for Optically Reconfigurable Gate Arrays

Minoru Watanabe, Fuminori Kobayashi, Rio Miyazaki, 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

Shield Effect Analysis for a Gate Array on An Optically Reconfigurable Gate Array

Minoru Watanabe, Fuminori Kobayashi, 2006, ERSA.