M.-S. Liang

Stress memorization technique (SMT) by selectively strained-nitride capping for sub-65nm high-performance strained-Si device application

C.C. Chen, H.J. Tao, C.H. Diaz, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Optimization and scaling limit forecast of nitrided gate oxide using an equivalent nitride/oxide (N/O) stack model

T.-L. Lee, S.-C. Chen, V.S. Chang, 2004, 2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).

Fault detection and classification of plasma CVD tool

M.-S. Liang, B. H. Chen, Hsueh-Chang Wu, 2003 .

Extended scaling of ultrathin gate oxynitride toward sub-65nm CMOS by optimization of UV photo-oxidation, soft plasma/thermal nitridation & stress enhancement

T.-L. Lee, S.-C. Chen, V.S. Chang, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..