Daire Breathnach

A programmable RFSoC in 16nm FinFET technology for wideband communications

Bob Verbruggen, Liam Madden, Patrick Lynch, 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET

Alonso Morgado, Bob Verbruggen, Patrick Lynch, 2018, 2018 IEEE Symposium on VLSI Circuits.

A Heterogeneous 3D-IC Consisting of Two 28 nm FPGA Die and 32 Reconfigurable High-Performance Data Converters

Anthony Collins, Liam Madden, Patrick Lynch, 2014, IEEE Journal of Solid-State Circuits.

16.1 A 13b 4GS/s digitally assisted dynamic 3-stage asynchronous pipelined-SAR ADC

Bob Verbruggen, John McGrath, Bruno Vaz, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

6.3 A Heterogeneous 3D-IC consisting of two 28nm FPGA die and 32 reconfigurable high-performance data converters

Liam Madden, Patrick Lynch, Anthony Collins, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

High-Speed ADCs for Wireless Base Stations

Alonso Morgado, Bob Verbruggen, Brian Long, 2020 .

A modular 16NM Direct-RF TX/RX Embedding 9GS/S DAC and 4.5GS/S ADC with 90DB Isolation and Sub-80PS Channel Alignment for Monolithic Integration in 5G Base-Station SoC

Bob Verbruggen, Ryan Kinnerk, Bruno Vaz, 2018, 2018 IEEE Symposium on VLSI Circuits.