Borivoje Nikolic

发表

Achieving 550MHz in a Standard Cell ASIC Methodology

Kurt Keutzer, David Chinnery, Borivoje Nikolic, 2004 .

Borivoje Nikolic, 2018, 2018 48th European Solid-State Device Research Conference (ESSDERC).

Measurement and analysis of variability in 45nm strained-Si CMOS technology

Borivoje Nikolic, Liang-Teck Pang, B. Nikolić, 2008, 2008 IEEE Custom Integrated Circuits Conference.

LDPC decoder architecture for high-data rate personal-area networks

Borivoje Nikolic, Matthew Weiner, Zhengya Zhang, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

SRAM stability characterization using tunable ring oscillators in 45nm CMOS

Zheng Guo, Borivoje Nikolic, Tsu-Jae King Liu, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Coding and system design for quantize-map-and-forward relaying

David Tse, I-Hsiang Wang, Borivoje Nikolic, 2013, IEEE Journal on Selected Areas in Communications.

Specialization for energy efficiency using agile development

David Patterson, Elad Alon, Borivoje Nikolic, 2015, 2015 Fourth Berkeley Symposium on Energy Efficient Electronic Systems (E3S).

Lowering LDPC Error Floors by Postprocessing

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2008, IEEE GLOBECOM 2008 - 2008 IEEE Global Telecommunications Conference.

MHz-rate Multi-Antenna Decoders: Dedicated SVD Chip Example

Robert W. Brodersen, Chia-Hsiang Yang, Borivoje Nikolic, 2012 .

A High-Throughput, Flexible LDPC Decoder for Multi- Gb/s Wireless Personal Area Networks

Borivoje Nikolic, Matthew Weiner, B. Nikolić, 2010 .

A 0.4 GHz – 4 GHz direct RF-to-digital ΣΔ multi-mode receiver

Borivoje Nikolic, Charles Wu, 2013, 2013 Proceedings of the ESSCIRC (ESSCIRC).

Technology Variability From a Design Perspective

Zheng Guo, Bastien Giraud, Borivoje Nikolic, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

A scalable massive MIMO array architecture based on common modules

Antonio Puglielli, Elad Alon, Thomas A. Courtade, 2015, 2015 IEEE International Conference on Communication Workshop (ICCW).

A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET

Kannan Ramchandran, Elad Alon, Borivoje Nikolic, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

Low-power inductorless RF receiver front-end with IIP2 calibration through body bias control in 28nm UTBB FDSOI

Vladimir Milovanovic, Andreia Cathelin, Borivoje Nikolic, 2016, 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

Tri-gate bulk CMOS technology for improved SRAM scalability

Borivoje Nikolic, Changhwan Shin, Tsu-Jae King Liu, 2010, 2010 Proceedings of the European Solid State Device Research Conference.

Invited: Open-Source EDA Tools and IP, A View from the Trenches

Elad Alon, Borivoje Nikolic, Krste Asanovic, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Error floors in LDPC codes: Fast simulation, bounds and hardware emulation

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2008, 2008 IEEE International Symposium on Information Theory.

Analysis of Absorbing Sets for Array-Based LDPC Codes

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2007, 2007 IEEE International Conference on Communications.

A Self-Adjustable Clock Generator With Wide Dynamic Range in 28 nm FDSOI

Borivoje Nikolic, Jaehwa Kwak, 2016, IEEE Journal of Solid-State Circuits.

Parameter-specific ring oscillator for process monitoring at the 45 nm node

Andrew R. Neureuther, Borivoje Nikolic, Tsu-Jae King Liu, 2010, IEEE Custom Integrated Circuits Conference 2010.

SRAM Read/Write Margin Enhancements Using FinFETs

Zheng Guo, Borivoje Nikolic, Sriram Balasubramanian, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

ACED: A Hardware Library for Generating DSP Systems

Borivoje Nikolic, Adam M. Izraelevitz, Jonathan Bachrach, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

A 2 Gb/s 5.6 mW Digital LOS/NLOS Equalizer for the 60 GHz Band

Borivoje Nikolic, Ji-Hoon Park, Brian C. Richards, 2011, IEEE Journal of Solid-State Circuits.

Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results

Vojin G. Oklobdzija, Dragan Maksimovic, Borivoje Nikolic, 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

Fixed- and variable-length ring oscillators for variability characterization in 45nm CMOS

Borivoje Nikolic, Liang-Teck Pang, Ji-Hoon Park, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Methods for true power minimization

Vladimir Stojanovic, Mark Horowitz, Robert W. Brodersen, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

Large-Scale SRAM Variability Characterization in 45 nm CMOS

Borivoje Nikolic, Liang-Teck Pang, Andrew Carlson, 2009, IEEE Journal of Solid-State Circuits.

Design of LDPC decoders for improved low error rate performance: quantization and algorithm choices

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2009, IEEE Transactions on Communications.

Quantization Effects in Low-Density Parity-Check Decoders

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2007, 2007 IEEE International Conference on Communications.

Peak-to-Average Power Ratio Reduction in an FDM Broadcast System

Borivoje Nikolic, Ahmad Bahai, Zhengya Zhang, 2007, 2007 IEEE Workshop on Signal Processing Systems.

An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS

David A. Patterson, Borivoje Nikolic, Krste Asanovic, 2018, 2018 IEEE Symposium on VLSI Circuits.

Achieving 550 MHz in an ASIC methodology

David G. Chinnery, Kurt Keutzer, Borivoje Nikolic, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Compensation of systematic variations through optimal biasing of SRAM wordlines

Zheng Guo, Borivoje Nikolic, Tsu-Jae King Liu, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Improving Hardware Reusability: Software Defined Hardware

Elad Alon, Borivoje Nikolic, Christopher Celio, 2017 .

Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor

Borivoje Nikolic, Krste Asanovic, Brian Zimmer, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 15 MHz to 600 MHz, 20 mW, 0.38 mm $^{2}$ Split-Control, Fast Coarse Locking Digital DLL in 0.13 $\mu$ m CMOS

Borivoje Nikolic, Yun Chiu, Sebastian Hoyos, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Design of Energy- and Cost-Efficient Massive MIMO Arrays

Ali M. Niknejad, Vladimir Milovanovic, Antonio Puglielli, 2016, Proceedings of the IEEE.

Discrete-Time, Linear Periodically Time-Variant Phase-Locked Loop Model for Jitter Analysis

Vladimir Stojanovic, Borivoje Nikolic, Socrates D. Vamvakos, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

Modeling Radiation-Induced Soft Errors in Logic and the Overhead of Resiliency Techniques

Borivoje Nikolic, Steven Bailey, 2014 .

A 28nm FDSOI 8192-point digital ASIC spectrometer from a Chisel generator

Dan Werthimer, Vladimir Milovanovic, Borivoje Nikolic, 2018, 2018 IEEE Custom Integrated Circuits Conference (CICC).

An Efficient 10GBASE-T Ethernet LDPC Decoder Design With Low Error Floors

Martin J. Wainwright, Venkat Anantharam, Borivoje Nikolic, 2010, IEEE Journal of Solid-State Circuits.

Scaling of analog-to-digital converters into ultra-deep-submicron CMOS

Borivoje Nikolic, Yun Chiu, Paul R. Gray, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

A 2.8GS/s 44.6mW time-interleaved ADC achieving 50.9dB SNDR and 3dB effective resolution bandwidth of 1.5GHz in 65nm CMOS

Borivoje Nikolic, Dusan Stepanovic, B. Nikolić, 2012, 2012 Symposium on VLSI Circuits (VLSIC).

Design of a low-latency, high-reliability wireless communication system for control applications

Anant Sahai, Borivoje Nikolic, Matthew Weiner, 2014, 2014 IEEE International Conference on Communications (ICC).

Opportunities for Fine-Grained Adaptive Voltage Scaling to Improve System-Level Energy Efficiency

Borivoje Nikolic, Ben Keller, B. Nikolić, 2015 .

A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET

Elad Alon, Borivoje Nikolic, James Dunn, 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud

Randy H. Katz, Borivoje Nikolic, Krste Asanovic, 2019, IEEE Micro.

Managing variability for ultimate energy efficiency

Borivoje Nikolic, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

Measurements and Analysis of Process Variability in 90 nm CMOS

Borivoje Nikolic, Liang-Teck Pang, 2009, IEEE Journal of Solid-State Circuits.

Dynamic SRAM stability characterization in 45nm CMOS

Zheng Guo, Borivoje Nikolic, Seng Oon Toh, 2010, 2010 Symposium on VLSI Circuits.

SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS

Borivoje Nikolic, Olivier Thomas, Krste Asanovic, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

Cooperative Communication for Control over Wireless pdf

Anant Sahai, Gireeja Ranade, Borivoje Nikolic, 2016, ArXiv.

List Viterbi decoding with continuous error detection for magnetic recording

Kannan Ramchandran, Dragan Petrovic, Borivoje Nikolic, 2001, GLOBECOM'01. IEEE Global Telecommunications Conference (Cat. No.01CH37270).

Least mean square adaptive digital background calibration of pipelined analog-to-digital converters

Borivoje Nikolic, Yun Chiu, Paul R. Gray, 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

Characterization of Dynamic SRAM Stability in 45 nm CMOS

Zheng Guo, Borivoje Nikolic, Tsu-Jae King Liu, 2011, IEEE Journal of Solid-State Circuits.

25.4 A 1.8V 14b 10MS/s Pipelined ADC in 0.18µm CMOS with 99dB SFDR

Borivoje Nikolic, Yun Chiu, Paul R. Gray, 2004 .

On-chip spur and phase noise cancellation techniques

Ali M. Niknejad, Borivoje Nikolic, Monte Mar, 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A-1-47 Novel fast digital calibration for pipelined ADC's

Borivoje Nikolic, Takashi Oshima, Cheonguyen Tsang, 2007 .

A yield optimization methodology for mixed-signal circuits

Borivoje Nikolic, Aikaterini Papadopoulou, B. Nikolić, 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

Circuit and architectural techniques for minimum-energy operation of SRAM-based caches

Borivoje Nikolic, Brian Zimmer, Krste Asanovic, 2016 .

Energy–Delay Optimization of 64-Bit Carry-Lookahead Adders With a 240 ps 90 nm CMOS Design Example

Borivoje Nikolic, Sean Kao, Radu Zlatanovici, 2009, IEEE Journal of Solid-State Circuits.

Level conversion for dual-supply systems

Borivoje Nikolic, Farhana Sheikh, F. Ishihara, 2004 .

Low-density parity-check code constructions for hardware implementation

Borivoje Nikolic, Engling Yeo, Edward Liao, 2004, 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577).

A low-voltage low-offset dual strong-arm latch comparator

Vladimir Milovanovic, Borivoje Nikolic, Aikaterini Papadopoulou, 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Power-Limited Design

Borivoje Nikolic, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Network coding for high-reliability low-latency wireless control

Anant Sahai, Gireeja Ranade, Borivoje Nikolic, 2016, WCNC.

A fast, flexible, positive and negative adaptive body-bias generator in 28nm FDSOI

Philippe Flatresse, Borivoje Nikolic, Andrei Vladimirescu, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

ASIC Design and Verification in an FPGA Environment

Robert W. Brodersen, Dejan Markovic, Borivoje Nikolic, 2007, 2007 IEEE Custom Integrated Circuits Conference.

Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM

Borivoje Nikolic, Olivier Thomas, Krste Asanovic, 2014, 2014 44th European Solid State Device Research Conference (ESSDERC).

Measurement and Analysis of Variability in 45 nm Strained-Si CMOS Technology

Borivoje Nikolic, Liang-Teck Pang, Kun Qian, 2009, IEEE Journal of Solid-State Circuits.

Phase noise scaling and tracking in OFDM multi-user beamforming arrays

Ali M. Niknejad, Antonio Puglielli, Elad Alon, 2016, 2016 IEEE International Conference on Communications (ICC).

Design insights for reliable energy efficient OxRAM-based flip-flop in 28nm FD-SOI

Borivoje Nikolic, Olivier Thomas, Elisa Vianello, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

A Differential 2R Crosspoint RRAM Array With Zero Standby Current

Borivoje Nikolic, Pi-Feng Chiu, B. Nikolić, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Discrete-time, cyclostationary phase-locked loop model for jitter analysis

Vladimir Stojanovic, Borivoje Nikolic, Sokratis D. Vamvakos, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Analysis of Absorbing Sets and Fully Absorbing Sets of Array-Based LDPC Codes

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2009, IEEE Transactions on Information Theory.

A 2-Gb/s 5.6-mW digital equalizer for a LOS/NLOS receiver in the 60GHz band

Borivoje Nikolic, Ji-Hoon Park, Brian Richards, 2010, 2010 IEEE Asian Solid-State Circuits Conference.

Read/Write Channel Implementation

Borivoje Nikolic, Engling Yeo, Michael Leung etal, 2004 .

SRAM design in fully-depleted SOI technology

Xin Sun, Borivoje Nikolic, Tsu-Jae King Liu, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Relay scheduling and interference cancellation for quantize-map-and-forward cooperative relaying

David Tse, I-Hsiang Wang, Borivoje Nikolic, 2013, 2013 IEEE International Symposium on Information Theory.

Power - Performance Optimization for Custom Digital Circuits

Borivoje Nikolic, Radu Zlatanovici, 2006, J. Low Power Electron..

A dual-mode, correlation-based spectrum sensing receiver for TV white space applications achieving −104dBm sensitivity

Borivoje Nikolic, Xiao Xiao, 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance

Elad Alon, Borivoje Nikolic, Woorham Bae, 2019, IEEE Journal of Solid-State Circuits.

Digital Integrated Circuits

Jan M. Rabaey, Anantha P. Chandrakasan, Borivoje Nikolic, 2003 .

Generating the Next Wave of Custom Silicon

Elad Alon, Borivoje Nikolic, Krste Asanovic, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

Analysis and design of low-energy flip-flops

Robert W. Brodersen, Dejan Markovic, Borivoje Nikolic, 2001, ISLPED '01.

On-chip I–V variability and random telegraph noise characterization in 28 nm CMOS

Scott Taylor, Vladimir Milovanovic, Borivoje Nikolic, 2016, 2016 46th European Solid-State Device Research Conference (ESSDERC).

Mixed-signal data interface for maskless lithography

Borivoje Nikolic, Benjamin Warlick, 2004, SPIE Advanced Lithography.

Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors

Elad Alon, Borivoje Nikolic, Krste Asanovic, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 1.5GS/s 4096-point digital spectrum analyzer for space-borne applications

Dan Werthimer, Henry Chen, Borivoje Nikolic, 2009, 2009 IEEE Custom Integrated Circuits Conference.

FinFET-based SRAM design

Zheng Guo, Borivoje Nikolic, Sriram Balasubramanian, 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

Rapid design and analysis of communication systems using the BEE hardware emulation environment

Robert W. Brodersen, Borivoje Nikolic, Chen Chang, 2003, 14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings..

General method in synthesis of pass-transistor circuits

Vojin G. Oklobdzija, Borivoje Nikolic, Dejan Markovic, 2000 .

27.7 A scalable 1.5-to-6Gb/s 6.2-to-38.1mW LDPC decoder for 60GHz wireless networks in 28nm UTBB FDSOI

Philippe Flatresse, Borivoje Nikolic, Matthew Weiner, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

Power and Area Efficient VLSI Architectures for Communication Signal Processing

Robert W. Brodersen, Dejan Markovic, Borivoje Nikolic, 2006, 2006 IEEE International Conference on Communications.

A generator of memory-based, runtime-reconfigurable 2N3M5K FFT engines

Borivoje Nikolic, Jonathan Bachrach, Angie Wang, 2016, 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Reduced complexity compression algorithms for direct-write maskless lithography systems

Avideh Zakhor, Borivoje Nikolic, Vito Dai, 2006, SPIE Advanced Lithography.

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI

Elad Alon, Philippe Flatresse, Borivoje Nikolic, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

Predicting Wireless Channels for Ultra-Reliable Low-Latency Communications

Anant Sahai, Gireeja Ranade, Borivoje Nikolic, 2018, 2018 IEEE International Symposium on Information Theory (ISIT).

Towards Efficient Spectrum Sharing

Borivoje Nikolic, 2007, 2007 6th IEEE Dallas Circuits and Systems Workshop on System-on-Chip.

Impact of random telegraph signaling noise on SRAM stability

Borivoje Nikolic, Tsu-Jae King Liu, Seng Oon Toh, 2011, 2011 Symposium on VLSI Technology - Digest of Technical Papers.

Layout decompression chip for maskless lithography

Avideh Zakhor, Borivoje Nikolic, Vito Dai, 2004, SPIE Advanced Lithography.

Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC

Elad Alon, Borivoje Nikolic, Krste Asanovic, 2016, ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference.

Power - Performance Optimization for Custom Digital Circuits

Borivoje Nikolic, Radu Zlatanovici, 2005, PATMOS.

Rate 8/9 sliding block distance-enhancing code with stationary detector

Borivoje Nikolic, M. Ming-Tak Leung, L. Ki-Chun Fu, 2001 .

Cooperative communication for high-reliability low-latency wireless control

Anant Sahai, Gireeja Ranade, Borivoje Nikolic, 2015, 2015 IEEE International Conference on Communications (ICC).

Methods for true power minimization

Vladimir Stojanovic, Robert W. Brodersen, Dejan Markovic, 2002, ICCAD 2002.

A 47 Gb/s LDPC decoder with improved low error rate performance

Martin J. Wainwright, Venkat Anantharam, Borivoje Nikolic, 2009, 2009 Symposium on VLSI Circuits.

Power and Area Minimization for Multidimensional Signal Processing

Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen, 2007, IEEE Journal of Solid-State Circuits.

BAG2: A process-portable framework for generator-based AMS circuit design

Elad Alon, Borivoje Nikolic, Zhongkai Wang, 2018, 2018 IEEE Custom Integrated Circuits Conference (CICC).

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI

Elad Alon, Philippe Flatresse, Borivoje Nikolic, 2016, IEEE Journal of Solid-State Circuits.

GEN03-6: Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2006, IEEE Globecom 2006.

BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS

David A. Patterson, Borivoje Nikolic, Krste Asanovic, 2019, IEEE Micro.

On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC

Borivoje Nikolic, Sylvain Clerc, Philippe Roche, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A Dual-Mode Configurable RF-to-Digital Receiver in 16NM FinFET

Ashoke Ravi, Borivoje Nikolic, Farhana Sheikh, 2018, 2018 IEEE Symposium on VLSI Circuits.

Network coding for high-reliability low-latency wireless control

Anant Sahai, Gireeja Ranade, Borivoje Nikolic, 2016, 2016 IEEE Wireless Communications and Networking Conference.

Low error rate LDPC decoders

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2009, 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers.

A 1–190MSample/s 8–64 tap energy-efficient reconfigurable FIR filter for multi-mode wireless communication

Dejan Markovic, Borivoje Nikolic, Farhana Sheikh, 2010, 2010 Symposium on VLSI Circuits.

A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET

Elad Alon, Borivoje Nikolic, Woo-Rham Bae, 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC).

A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET

Elad Alon, Borivoje Nikolic, Zhongkai Wang, 2018, 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 550–2260MHz self-adjustable clock generator in 28nm FDSOI

Borivoje Nikolic, Jaehwa Kwak, 2015, 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Predicting error floors of structured LDPC codes: deterministic bounds and estimates

Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, 2009, IEEE Journal on Selected Areas in Communications.

Energy-Efficient Design in FDSOI

Borivoje Nikolic, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

A 65nm CMOS transceiver with integrated active cancellation supporting FDD from 1GHz to 1.8GHz at +12.6dBm TX power leakage

Ali M. Niknejad, Lucas Calderin, Sameet Ramakrishnan, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

Background ADC calibration in digital domain

Robert W. Brodersen, Borivoje Nikolic, Yun Chiu, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Reduced complexity sequence detection for high-order partial response channels

Taehyun Jeon, Borivoje Nikolic, Michael Leung, 2001, IEEE J. Sel. Areas Commun..

Design considerations for low-noise transconductance amplifiers in 28nm UTBB-FDSOI

Andreia Cathelin, Borivoje Nikolic, Andrei Vladimirescu, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

Clocked CMOS adiabatic logic with integrated single-phase power-clock supply

Vojin G. Oklobdzija, Dragan Maksimovic, Borivoje Nikolic, 2000, IEEE Trans. Very Large Scale Integr. Syst..

Design and optimization of sense–amplifier–based flip–flops

Vojin G. Oklobdzija, Borivoje Nikolic, 1999 .

Simpler, more efficient design

Borivoje Nikolic, 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

VLSI architectures for iterative decoders in magnetic recording channels

Payam Pakzad, Venkat Anantharam, Borivoje Nikolic, 2001 .

Hardware implementation of Block GC3 lossless compression algorithm for direct-write lithography systems

Avideh Zakhor, Borivoje Nikolic, Brian Richards, 2010, Advanced Lithography.

Phase-locked loop architecture for adaptive jitter optimization

Borivoje Nikolic, Sokratis D. Vamvakos, Carl Werner, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A 65nm CMOS wideband TDD front-end with integrated T/R switching via PA re-use

Ali M. Niknejad, Elad Alon, Borivoje Nikolic, 2016, ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference.

A Wideband 400 MHz-to-4 GHz Direct RF-to-Digital Multimode $\Delta\Sigma$ Receiver

Elad Alon, Borivoje Nikolic, Charles Wu, 2014, IEEE Journal of Solid-State Circuits.

Quasi-planar bulk CMOS technology for improved SRAM scalability

Borivoje Nikolic, Tsu-Jae King Liu, Changhwan Shin, 2011 .

A 2.8 GS/s 44.6 mW Time-Interleaved ADC Achieving 50.9 dB SNDR and 3 dB Effective Resolution Bandwidth of 1.5 GHz in 65 nm CMOS

Borivoje Nikolic, Dusan Stepanovic, B. Nikolić, 2013, IEEE Journal of Solid-State Circuits.

A double-tail sense amplifier for low-voltage SRAM in 28nm technology

Borivoje Nikolic, Brian Zimmer, Pi-Feng Chiu, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Combining dual-supply, dual-threshold and transistor sizing for power reduction

Borivoje Nikolic, Stephanie Augsburger, B. Nikolić, 2002, Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Wireless Communication for High-reliability 2 Low-latency Control - Part I

Anant Sahai, Gireeja Ranade, Borivoje Nikolic, 2016 .

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking

Elad Alon, Borivoje Nikolic, Krste Asanovic, 2015, 2015 IEEE Hot Chips 27 Symposium (HCS).

A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers

Nai-Chung Kuo, Ali M. Niknejad, Elad Alon, 2014, 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET

Jerry Zhao, Elad Alon, Borivoje Nikolic, 2021, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC).

Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs

Borivoje Nikolic, Krste Asanovic, Yakun Sophia Shao, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET

Elad Alon, Borivoje Nikolic, Krste Asanovic, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

A Scalable Massive MIMO Uplink Baseband Processing Generator

Borivoje Nikolic, Greg LaCaille, Harrison Liew, 2021, ICC 2021 - IEEE International Conference on Communications.

Automated Design of Analog Circuits Using Reinforcement Learning

Borivoje Nikolic, Keertana Settaluri, Zhaokai Liu, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration

Jerry Zhao, Ion Stoica, Borivoje Nikolic, 2019, 2021 58th ACM/IEEE Design Automation Conference (DAC).

Memory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms

Borivoje Nikolic, Yakun Sophia Shao, Sehoon Kim, 2021, 2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).

A Hardware Accelerator for Protocol Buffers

Jerry Zhao, Borivoje Nikolic, Parthasarathy Ranganathan, 2021, MICRO.

An Automated and Process-Portable Generator for Phase-Locked Loop

Elad Alon, Borivoje Nikolic, Sijun Du, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

14.1 A 71-to-86GHz Packaged 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver in 28nm CMOS

Ali M. Niknejad, Elad Alon, Borivoje Nikolic, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Design Trade-offs of a 6 T FinFET SRAM Cell in the Presence of Variations

Borivoje Nikolic, Mohan Dunga, Eric Y. Chin, 2007 .

A highly reconfigurable 400–1700MHz receiver using a down-converting sigma-delta A/D with 59-dB SNR and 57-dB SFDR over 4-MHz bandwidth

Borivoje Nikolic, Renaldi Winoto, 2009, 2009 Symposium on VLSI Circuits.

An Interference-Resilient Wideband Mixer-First Receiver With LO Leakage Suppression and I/Q Correlated Orthogonal Calibration

Borivoje Nikolic, Yanjie Wang, Charles Wu, 2016, IEEE Transactions on Microwave Theory and Techniques.

Quantize-map-and-forward relaying: Coding and system design

David Tse, I-Hsiang Wang, Borivoje Nikolic, 2010, 2010 48th Annual Allerton Conference on Communication, Control, and Computing (Allerton).

SRAM yield enhancement with thin-BOX FD-SOI

Borivoje Nikolic, Changhwan Shin, Yasumasa Tsukamoto, 2009, 2009 IEEE International SOI Conference.

A passive-mixer-first receiver with LO leakage suppression, 2.6dB NF, >15dBm wide-band IIP3, 66dB IRR supporting non-contiguous carrier aggregation

Borivoje Nikolic, Yanjie Wang, Charles Wu, 2015, 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

IEEE Transactions on Circuits and Systems II: Express Briefs

Vikram Krishnamurthy, Luciano Lavagno, Gaetano Palumbo, 2004 .

Circuit-Performance Implications for Double-Gate MOSFET Scaling below 25 nm

Borivoje Nikolic, Leland Chang, Tsu-Jae King, 2003 .

SRAM cell design considerations for SOI technology

Borivoje Nikolic, Changhwan Shin, Bich-Yen Nguyen, 2009, 2009 IEEE International SOI Conference.

Performance of Deeply-Scaled, Power-Constrained Circuits

Borivoje Nikolic, Leland Chang, Tsu-Jae King, 2003 .

Wafer Scale Distributed Radio

Jan M. Rabaey, Ali M. Niknejad, Elad Alon, 2009 .

Hypersensitive parameter-identifying ring oscillators for lithography process monitoring

Elad Alon, Borivoje Nikolic, Andrew R. Neureuther, 2008, SPIE Advanced Lithography.