Spyros Blionas

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Microarchitecture of a MultiCore SoC for Data Analysis of a Lab-on-Chip Microarray

George Kornaros, Spyros Blionas, 2008, EURASIP J. Adv. Signal Process..

Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms

Dimitrios Soudris, Kostas Masselos, Adonios Thanailakis, 2003, PATMOS.

Realization of wireless multimedia communication systems on reconfigurable platforms

Kostas Masselos, Spyros Blionas, Antti Pelkonen, 2003, J. Syst. Archit..

Lab-on-Chip for Pharmacogenomics: An Embedded System Organization

George Kornaros, Spyros Blionas, Athanasios Demiris, 2009 .

Industrial approach in design methodologies for mobile communications systems

Dimitris Metafas, Spyros Blionas, H. C. Karathanasis, 1996, Proceedings Seventh IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype.

Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform

Dimitrios Soudris, Kostas Masselos, Spiridon Nikolaidis, 2004, PATMOS.

Energy-Aware System-on-Chip for 5 GHz Wireless LANs

Enrico Macii, Roberto Zafalon, Spiridon Nikolaidis, 2005, PATMOS.

A Multi-level Validation Methodology for Wireless Network Applications

Christos Drosos, Dimitris Metafas, Labros Bisdounis, 2004, PATMOS.

Physical Layer of a Base-band OFDM Modem: Algorithms and Performance

Aristodemos Pnevmatikakis, Spyros Blionas, Dimitris Triantis, 2005, J. Circuits Syst. Comput..

Rapid Prototyping of a Wireless LAN Implementation Using a UML-Based System Design Methodology

Christos Drosos, Dimitris Metafas, George D. Papadopoulos, 2004, IEICE Trans. Inf. Syst..

A reusable IP FFT core for DSP applications

Dimitrios Soudris, Kostas Masselos, Adonios Thanailakis, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size

Dimitrios Soudris, Christos S. Koukourlis, Adonios Thanailakis, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

On the implementation of a baseband processor for a portable dual mode DECT/GSM terminal

Dimitrios Soudris, Chrissavgi Dre, Christos Drosos, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Instruction level energy modeling for pipelined processors

Theodore Laopoulos, Spiridon Nikolaidis, Nikolaos Kavvadias, 2005, J. Embed. Comput..

A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip

Kostas Masselos, Chrissavgi Dre, Christos Drosos, 2002, FPL.

Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications

Enrico Macii, Roberto Zafalon, Spiridon Nikolaidis, 2006, J. Low Power Electron..

Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations

Dimitrios Soudris, Kostas Masselos, Adonios Thanailakis, 2002, FPL.