Satrughna Singha

A new architecture for FPGA implementation of a MAC unit for digital signal processors using mixed number system

Amitabha Sinha, Aniruddha Ghosh, Satrughna Singha, 2012, CARN.

A Novel Architecture ofMixed Number System MAC Unitfor Digital Signal Processors

Amitabha Sinha, Aniruddha Ghosh, Satrughna Singha, 2010 .

A new architecture for FPGA based implementation of conversion of binary to double base number system (DBNS) using parallel search technique

Amitabha Sinha, Aniruddha Ghosh, Satrughna Singha, 2012, CARN.

"Floating point RNS": a new concept for designing the MAC unit of digital signal processor

Amitabha Sinha, Aniruddha Ghosh, Satrughna Singha, 2012, CARN.

A New Architecture for Transformation of Binary to Double Base Number System (DBNS) with Bases 2 and 5 using Different Search Algorithms

Amitabha Sinha, Satrughna Singha, 2021 .