Ho-Cheung Ng

发表

High-throughput microparticle screening by 1-μm time-stretch optofluidic imaging integrated with a field-programmable gate array platform

K. Tsia, B. F. Chung, H. So, 2016, 2016 Conference on Lasers and Electro-Optics (CLEO).

Low-Latency In Situ Image Analytics With FPGA-Based Quantized Convolutional Neural Network

Hayden Kwok-Hay So, Kelvin C. M. Lee, Bob M. F. Chung, 2021, IEEE Transactions on Neural Networks and Learning Systems.

Reconfigurable Acceleration of Short Read Mapping with Biological Consideration

Wayne Luk, Shuanglong Liu, Ho-Cheung Ng, 2021, FPGA.

Deep Neural Network Approximation for Custom Hardware

Wayne Luk, Xinyu Niu, Peter Y. K. Cheung, 2019, ACM Comput. Surv..

Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of efforts

Wayne Luk, Shuanglong Liu, Ho-Cheung Ng, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA

Wayne Luk, Zhiqiang Que, Hongxiang Fan, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA

Wayne Luk, Hongxiang Fan, Xinyu Niu, 2018, ACM Trans. Reconfigurable Technol. Syst..

Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA

Wayne Luk, Xinyu Niu, Ruizhe Zhao, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

Memory-Efficient Architecture for Accelerating Generative Networks on FPGA

Wayne Luk, Zhiqiang Que, Hongxiang Fan, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Acceleration of Short Read Alignment with Runtime Reconfiguration

Ringo S. W. Chu, W. Luk, Man-Chung Yue, 2020, 2020 International Conference on Field-Programmable Technology (ICFPT).

Investigating the Feasibility of FPGA-based Network Switches

Wayne Luk, Jiuxi Meng, Paolo Costa, 2019, 2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Honeycomb: ordered key-value store acceleration on an FPGA-based SmartNIC

A. Dragojevic, I. Zablotchi, Anuj Kalia, 2023, ArXiv.

Hardware Compilation of Deep Neural Networks: An Overview

Wayne Luk, Xinyu Niu, Xiwei Wang, 2018, 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Towards FPGA-assisted spark: An SVM training acceleration case study

Hayden Kwok-Hay So, Ho-Cheung Ng, Maolin Wang, 2016, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation

Wayne Luk, Zhiqiang Que, Hongxiang Fan, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

QuickDough: A rapid FPGA loop accelerator design framework using soft CGRA overlay

Cheng Liu, Hayden Kwok-Hay So, Ho-Cheung Ng, 2015, 2015 International Conference on Field Programmable Technology (FPT).

Automatic Nested Loop Acceleration on FPGAs Using Soft CGRA Overlay

Hayden Kwok-Hay So, Ho-Cheung Ng, Cheng Liu, 2015, ArXiv.

High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform

Hayden Kwok-Hay So, Ho-Cheung Ng, Maolin Wang, 2016, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

All-passive pixel super-resolution of time-stretch imaging

Edmund Y. Lam, Hayden Kwok-Hay So, Antony C. S. Chan, 2016, Scientific Reports.