Nimit Nigania

HPerf: A Lightweight Profiler for Task Distribution on CPU+GPU Platforms

Hyesoon Kim, Bevin Brett, Joohwan Lee, 2015 .

OpenCL Performance Evaluation on Modern Multi Core CPUs

Hyojong Kim, Hyesoon Kim, Joo Hwan Lee, 2013, 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum.

A 16MHz BW 75dB DR CT ΔΣ ADC compensated for more than one cycle excess loop delay

Debasish Behera, Nagendra Krishnapura, Vikas Singh, 2011, 2011 IEEE Custom Integrated Circuits Conference (CICC).

OpenCL Performance Evaluation on Modern Multi Core CPUs

Hyesoon Kim, Hyojong Kim, Nimit Nigania, 2013, 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum.

Harmonica: An FPGA-Based Data Parallel Soft Core

Sudhakar Yalamanchili, Hyojong Kim, Hyesoon Kim, 2014, 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines.

Harmonica: An FPGA-Based Data Parallel Soft Core

Sudhakar Yalamanchili, Hyojong Kim, Hyesoon Kim, 2014, FCCM 2014.

FPGA prototyping of custom GPGPUs

Nimit Nigania, Nimit Nigania, 2014 .

A 16 MHz BW 75 dB DR CT $\Delta\Sigma$ ADC Compensated for More Than One Cycle Excess Loop Delay

Debasish Behera, Nagendra Krishnapura, Vikas Singh, 2012, IEEE Journal of Solid-State Circuits.