Chia-Tung Ho

SP&R: SMT-Based Simultaneous Place-and-Route for Standard Cell Synthesis of Advanced Nodes

Hayoung Kim, Dong-won Park, Bill Lin, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Monolithic 3D Semiconductor Footprint Scaling Exploration based on VFET Standard Cell Layout Methodology, Design Flow, and EDA Platform

Chung-Kuan Cheng, Daeyeal Lee, Bill Lin, 2022, IEEE Access.

Multirow Complementary-FET (CFET) Standard Cell Synthesis Framework Using Satisfiability Modulo Theories (SMTs)

Chung-Kuan Cheng, Chia-Tung Ho, Daeyeal Lee, 2021, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.

IncPIRD: Fast Learning-Based Prediction of Incremental IR Drop

Andrew B. Kahng, Chia-Tung Ho, A. Kahng, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Complementary-FET (CFET) Standard Cell Synthesis Framework for Design and System Technology Co-Optimization Using SMT

Chung-Kuan Cheng, Bill Lin, Chia-Tung Ho, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Design and System Technology Co-Optimization Sensitivity Prediction for VLSI Technology Development using Machine Learning

Chung-Kuan Cheng, Bill Lin, Chester Holtz, 2021, 2021 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).