M.Y. Niamat

Layout issues in bus encoding schemes

S.R. Vemuru, A.N. Elkammar, N. Scheinberg, 2005, 48th Midwest Symposium on Circuits and Systems, 2005..

A built in self test scheme for automatic interconnect fault diagnosis in multiple and single FPGA systems

M.Y. Niamat, A. Sahni, M.M. Jamali, 2007, 2007 50th Midwest Symposium on Circuits and Systems.

Testing of LUT delay aliasing faults in SRAM based FPGAs using half-frequencies

M.Y. Niamat, D. Koleti, M. Alam, 2007, 2007 50th Midwest Symposium on Circuits and Systems.

Testing FPGAs using JBits RTP cores

M.Y. Niamat, M. Alam, K.M. Attravanam, 2005, 48th Midwest Symposium on Circuits and Systems, 2005..