Ru-Ying Tong

STT-MRAM for embedded memory applications from eNVM to last level cache

Tom Zhong, Son T. Le, Jian Zhu, 2017 .

Demonstration of Ultra-Low Voltage and Ultra Low Power STT-MRAM designed for compatibility with 0x node embedded LLC applications

Tom Zhong, Yi Yang, Vignesh Sundar, 2018, 2018 IEEE Symposium on VLSI Technology.

New cover structure for improving dR / R of a MTJ device

Ru-Ying Tong, Cheng T Horng, Liubo Hong, 2005 .

Demonstration of fully functional 8Mb perpendicular STT-MRAM chips with sub-5ns writing for non-volatile embedded memories

Tom Zhong, Terry Torng, Luc Thomas, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Demonstration of an MgO based anti-fuse OTP design integrated with a fully functional STT-MRAM at the Mbit level

Tom Zhong, Terry Torng, Luc Thomas, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

STT-MRAM for embedded memory applications from eNVM to last level cache

Tom Zhong, Yi Yang, Vignesh Sundar, 2017, 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Achieving Sub-ns switching of STT-MRAM for future embedded LLC applications through improvement of nucleation and propagation switching mechanisms

Tom Zhong, Terry Torng, Luc Thomas, 2016, 2016 IEEE Symposium on VLSI Technology.

Comprehensive Reliability Study of STT-MRAM Devices and Chips for Last Level Cache Applications (LLC) at 0x Nodes

Tom Zhong, Vignesh Sundar, Yu-Jen Wang, 2019, 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

MRAM array with coupled soft-adjacent magnetic layer

Tai Min, Ru-Ying Tong, Liubo Hong, 2005 .

Solving the paradox of the inconsistent size dependence of thermal stability at device and chip-level in perpendicular STT-MRAM

Tom Zhong, Terry Torng, Guenole Jan, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

High Spin Torque Efficiency of Magnetic Tunnel Junctions with MgO/CoFeB/MgO Free Layer

Tom Zhong, Terry Torng, Guenole Jan, 2012 .