Christopher Lavin

Using Hard Macros to Accelerate FPGA Compilation for Xilinx FPGAs

Christopher Lavin, C. Lavin, 2012 .

RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs

Brent E. Nelson, Brad L. Hutchings, Marc Padilla, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

THE IMPLEMENTATION OF AN IRREGULAR VITERBI TRELLIS DECODER

Christopher Lavin, 2007 .

Space-Time Coding for Aeronautical Telemetry: Part I—Estimators

Michael Rice, Tom Nelson, Christopher Lavin, 2017, IEEE Transactions on Aerospace and Electronic Systems.

HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping

Brent E. Nelson, Brad L. Hutchings, Marc Padilla, 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.

Space-Time Coding for Aeronautical Telemetry: Part II—Decoder and System Performance

Michael Rice, Tom Nelson, Kip Temple, 2017, IEEE Transactions on Aerospace and Electronic Systems.

Performance of Thermoacoustic Refrigerators: Cooling Load and Coefficient of Performance

Christopher Lavin, Cila Herman, Zdeněk Trávníček, 2008 .

Impact of hard macro size on FPGA clock rate and place/route time

Brent E. Nelson, Brad L. Hutchings, Christopher Lavin, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

Rapid prototyping tools for FPGA designs: RapidSmith

Brent E. Nelson, Brad L. Hutchings, Marc Padilla, 2010, 2010 International Conference on Field-Programmable Technology.

Improving clock-rate of hard-macro designs

Brent E. Nelson, Brad L. Hutchings, Christopher Lavin, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

Using Hard Macros to Reduce FPGA Compilation Time

Brent E. Nelson, Brad L. Hutchings, Marc Padilla, 2010, 2010 International Conference on Field Programmable Logic and Applications.