Yexin Zheng

Fault-Tolerant Design for Nanowire-Based Programmable Logic Arrays

Chao Huang, Yexin Zheng, 2010 .

Reversible logic synthesis through ant colony optimization

Michael S. Hsiao, Chao Huang, Min Li, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Complete Logic Functionality of Reconfigurable RTD Circuit Elements

Chao Huang, Yexin Zheng, Yexin Zheng, 2009, IEEE Transactions on Nanotechnology.

A novel Toffoli network synthesis algorithm for reversible logic

Chao Huang, Yexin Zheng, Yexin Zheng, 2009, 2009 Asia and South Pacific Design Automation Conference.

Circuit Design Methods with Emerging Nanotechnologies

Yexin Zheng, Yexin Zheng, 2009 .

Reconfigurable RTD-based circuit elements of complete logic functionality

Chao Huang, Yexin Zheng, Yexin Zheng, 2008, 2008 Asia and South Pacific Design Automation Conference.

Defect-aware logic mapping for nanowire-based programmable logic arrays via satisfiability

Chao Huang, Yexin Zheng, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

SAT-based equivalence checking of threshold logic designs for nanotechnologies

Michael S. Hsiao, Chao Huang, Yexin Zheng, 2008, GLSVLSI '08.