Nikhil Jayakumar

发表

Computing Leakage Current Distributions

Sunil P. Khatri, Suganth Paul, Kanupriya Gulati, 2010 .

Network CodingforRoutability Improvement inVLSI

Alex Sprintson, Kanupriya Gulati, Nikhil Jayakumar, 2006 .

Circuit-Level Design Approaches for Radiation-Hard Digital Electronics

Gwan S. Choi, Sunil P. Khatri, Rajesh Garg, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

ISPD 2013 expert designer/user session (eds)

Mark Zwolinski, Laleh Behjat, Cliff C. N. Sze, 2013, ISPD '13.

Part II: Conclusions and Future Directions

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

On the Improvement of Statistical Static Timing Analysis.

Sunil P. Khatri, Rajesh Garg, Nikhil Jayakumar, 2006 .

Non-Manhattan routing using a Manhattan router

Sunil P. Khatri, Nikhil Jayakumar, Edward Hursey, 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

Simultaneous Input Vector Control and Circuit Modification

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

An ASIC design methodology with predictably low leakage, using leakage-immune standard cells

Sunil P. Khatri, Nikhil Jayakumar, 2003, ISLPED '03.

An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs

Sunil P. Khatri, Kanupriya Gulati, Nikhil Jayakumar, 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

A probabilistic method to determine the minimum leakage vector for combinational designs

Sunil P. Khatri, Kanupriya Gulati, Nikhil Jayakumar, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Minimizing and exploiting leakage in VLSI

Nikhil Jayakumar, 2009 .

A Structured ASIC Design Approach Using Pass Transistor Logic

Sunil P. Khatri, Kanupriya Gulati, Nikhil Jayakumar, 2007, 2007 IEEE International Symposium on Circuits and Systems.

High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems

Olgica Milenkovic, Sunil P. Khatri, Vijay Nagarajan, 2004, IEEE Global Telecommunications Conference, 2004. GLOBECOM '04..

Reclaiming the Sub-threshold Speed Penalty Through Micropipelining

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

X-routing using two Manhattan route instances

Vijay Balasubramanian, Sunil P. Khatri, Rabi N. Mahapatra, 2005, 2005 International Conference on Computer Design.

High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems

Olgica Milenkovic, Sunil P. Khatri, Vijay Nagarajan, 2004, IEEE Global Telecommunications Conference, 2004. GLOBECOM '04..

Practical techniques to reduce skew and its variations in buffered clock networks

Peng Li, Jiang Hu, Anand Rajaram, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

A Simultaneous Input Vector Control and Circuit Modification Technique to Reduce Leakage with Zero Delay Penalty

Sunil P. Khatri, Nikhil Jayakumar, 2010, TODE.

Part I: Conclusions and Future Directions

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

Implementation of the Chip

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

Finding a Minimal Leakage Vector in the Presence of Random PVT Variations Using Signal Probabilities

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

A PTL based highly testable structured ASIC design approach

Sunil P Khatri, Kanupriya Gulati, Nikhil Jayakumar, 2009, Proceedings of the 2009 12th International Symposium on Integrated Circuits.

A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations

Sunil P. Khatri, Suganth Paul, Nikhil Jayakumar, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Network coding for routability improvement in VLSI

Alexander Sprintson, Sunil P. Khatri, Kanupriya Gulati, 2006, ICCAD.

On-chip TIRF nanoscopy by applying Haar wavelet kernel analysis on intensity fluctuations induced by chip illumination.

Balpreet Singh Ahluwalia, Krishna Agarwal, Nikhil Jayakumar, 2020, Optics express.

An Algorithm to Minimize Leakage through Simultaneous Input Vector Control and Circuit Modification

Sunil P. Khatri, Nikhil Jayakumar, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Dynamically De-Skewable Clock Distribution Methodology

Sunil P. Khatri, A. Kapoor, Nikhil Jayakumar, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents

Sunil P. Khatri, Nikhil Jayakumar, Sandeep Dhar, 2005, Proceedings. 42nd Design Automation Conference, 2005..

A design flow to optimize circuit delay by using standard cells and PLAs

Sunil P. Khatri, Anshul Gupta, Rajesh Garg, 2006, GLSVLSI '06.

A metal and via maskset programmable VLSI design methodology using PLAs

Sunil P. Khatri, Nikhil Jayakumar, 2004, ICCAD 2004.

A Predictably Low-Leakage ASIC Design Style

Sunil P. Khatri, Nikhil Jayakumar, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

The HL Approach: A Low-Leakage ASIC Design Methodology

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

A design approach for radiation-hard digital electronics

Gwan S. Choi, Sunil P. Khatri, Rajesh Garg, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Adaptive Body Biasing to Compensate for PVT Variations

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

Minimizing and Exploiting Leakage in VLSI Design

Rajesh Garg, Suganth Paul, Nikhil Jayakumar, 2009 .

An Automated Approach for Minimum Jitter Buffered H-Tree Construction

Sunil P. Khatri, Rabi N. Mahapatra, Kalyana C. Bollapalli, 2011, 2011 24th Internatioal Conference on VLSI Design.

A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations

D. M. H. Walker, Sunil P. Khatri, Kanupriya Gulati, 2008, Integr..

Existing Leakage Minimization Approaches

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

A novel clock distribution and dynamic de-skewing methodology

Sunil P. Khatri, A. Kapoor, Nikhil Jayakumar, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

A High-Speed Fully-Programmable VLSI Decoder for Regular LDPC Codes

Gwan S. Choi, Sunil P. Khatri, Euncheol Kim, 2006, 2006 IEEE International Conference on Acoustics Speech and Signal Processing Proceedings.

Minimum energy near-threshold network of PLA based design

Sunil P. Khatri, Nikhil Jayakumar, 2005, 2005 International Conference on Computer Design.

A PLA based asynchronous micropipelining approach for subthreshold circuit design

Sunil P. Khatri, Rajesh Garg, Nikhil Jayakumar, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Design of the Chip

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

Dos and don'ts of CTL state coverage estimation

Fabio Somenzi, Mitra Purandare, Nikhil Jayakumar, 2003, DAC '03.

Exploiting Leakage: Sub-threshold Circuit Design

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

A variation-tolerant sub-threshold design approach

Sunil P. Khatri, Nikhil Jayakumar, 2005, Proceedings. 42nd Design Automation Conference, 2005..

A metal and via maskset programmable VLSI design methodology using PLAs

Sunil P. Khatri, Nikhil Jayakumar, N. Jayakumar, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

Optimum VDD for Minimum Energy

Sunil P. Khatri, Rajesh Garg, Suganth Paul, 2010 .

A low-jitter phase-locked resonant clock generation and distribution scheme

Sunil P. Khatri, Rabi N. Mahapatra, Kalyana C. Bollapalli, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).