N. S. Murthy

A closed-form delay estimation model for current-mode high speed VLSI interconnects

M. Kavicharan, N. S. Murthy, N. Bheema Rao, 2013, 2013 The International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE).

Neural automata based object recognition

E. G. Rajan, N. S. Murthy, V. Kumar, 1995, 1995 IEEE International Conference on Systems, Man and Cybernetics. Intelligent Systems for the 21st Century.

Digital beam former architecture for sixteen elements planar phased array radar

A. Vengadarajan, N. S. Murthy, D. G. Rao, 2013, 2013 The International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE).

Fully parallel and fully serial architecture for realization of high speed FIR filters with FPGA's

L. Anjaneyulu, N. S. Murthy, V. Sudhakar, 2012, 2012 International Conference on Devices, Circuits and Systems (ICDCS).

Optimization of Cooperative Spectrum Sensing under AWGN and Rayleigh Channels in Cognitive Radio Network

N. S. Murthy, G. Vidyadhar Reddy, 2013, 2013 Third International Conference on Advances in Computing and Communications.

Novel Method of Realization of Scalable VLSI Adaptive Digital Beamforming Architecture for Phased Array Radar

T. Kishore Kumar, A. Vengadarajan, N. S. Murthy, 2016 .

Efficient filter implementation using QRD-RLS algorithm for Phased Array Radar applications

A. Vengadarajan, N. S. Murthy, D. Govind Rao, 2013, 2013 The International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE).