Pooran Singh

发表

Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design

Santosh Kumar Vishvakarma, Vikas Vijayvargiya, V. Sharma, 2018, Integr..

Ultra-Low Power High Stability 8T SRAM for Application in Object Tracking System

Pooran Singh, Santosh Kumar Vishvakarma, Pooran Singh, 2018, IEEE Access.

Device/Circuit/Architectural Techniques for Ultra-low Power FPGA Design

Santosh Kumar Vishvakarma, Pooran Singh, S. Vishvakarma, 2013 .

Design of high speed DDR SDRAM controller with less logic utilization

Santosh Kumar Vishvakarma, Vikas Vijayvargiya, Pooran Singh, 2014, 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS).

RTL level implementation of high speed-low power Viterbi Encoder & Decoder

Pooran Singh, Santosh Kr. Vishvakarma, 2013, 2013 IEEE Third International Conference on Information Science and Technology (ICIST).

Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET

Santosh Kumar Vishvakarma, Devesh Dwivedi, Vikas Vijayvargiya, 2015, ACM Great Lakes Symposium on VLSI.

Dynamic power reduction through clock gating technique for low power memory applications

Santosh Kumar Vishvakarma, Pooran Singh, G. S. R. Srivatsava, 2015, 2015 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT).

Ultra-Low Power, Process-Tolerant 10T (PT10T) SRAM with Improved Read/Write Ability for Internet of Things (IoT) Applications

Santosh Kumar Vishvakarma, Pooran Singh, S. Vishvakarma, 2017 .

A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applications

Santosh Kumar Vishvakarma, Vishal Sharma, Pooran Singh, 2018 .

Ultra - low power high-stability robust sram design for FPGA, IoT and image processing applications

Pooran Singh, Santosh Kumar Vishwakarma, 2018 .

An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM

Santosh Kumar Vishvakarma, Devesh Dwivedi, Vikas Vijayvargiya, 2019, Circuits Syst. Signal Process..

STATUS OF THE NSLS-II INJECTION SYSTEM DEVELOPMENT*

John Skaritka, Erik D. Johnson, Yong Hu, 2010 .

Analogue/RF performance attributes of underlap tunnel field effect transistor for low power applications

Santosh Kumar Vishvakarma, Vikas Vijayvargiya, B. S. Reniwal, 2016 .

Dynamic Feedback Controlled Static Random Access Memory for Low Power Applications

Santosh Kumar Vishvakarma, Vikas Vijayvargiya, V. Sharma, 2017, J. Low Power Electron..

Low complexity-low power object tracking using dynamic quadtree pixelation and macroblock resizing

Pooran Singh, S. K. Vishvakarma, S. Vishvakarma, 2017, Pattern Recognition and Image Analysis.

POWER REDUCTION TECHNIQUES IN FIELD PROGRAMMABLE GATE ARRAY: A SURVEY

Santosh Kumar Vishvakarma, Pooran Singh, 2013 .

FPGA Implementation of 413.121 MHz and 11.34 mW High Speed Low Power Viterbi Decoder

Pooran Singh, Santosh Kr. Vishvakarma, 2013 .